EP2A15B724C9 vs EP2A15B724C Сравнение
Подробное сравнение бок о бок EP2A15B724C9 от Intel и EP2A15B724C от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EP2A15B724C9 | EP2A15B724C |
|---|---|---|
| Бренд | Intel | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | NRND | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $268,50 | $195,00 |
| Series | APEX II | — |
| Family | APEX II (EP2A15) | APEX II |
| Logic Elements | 16640 | — |
| Number of Gates | 600000 | — |
| Embedded Memory (RAM bits) | 425984 | — |
| User I/O Count | 492 | — |
| Supply Voltage (Core) | 1.5 V | — |
| I/O Voltages Supported | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) | — |
| Process Technology | 0.15 µm all-layer copper (up to 8 metal layers) | 0.18 micron CMOS |
| Maximum Internal Frequency | 500 MHz | — |
| LVDS Data Rate | Up to 1 Gbps (True-LVDS) | — |
| Interface Standards | LVDS, LVPECL, PCML, HyperTransport | — |
| Embedded Memory Type | ESB - dual-port RAM / ROM / FIFO / CAM | — |
| Clock Management | On-chip PLLs | — |
| Корпус | 724-ball FCBGA (Fine-pitch Chip-Scale BGA) | 724-Ball FCBGA (FineLine BGA) |
| Рабочая температура | Commercial (0 °C to +85 °C) | [DATA_NEEDED: operating temperature grade] |
| Тип монтажа | Surface Mount | Surface Mount (BGA) |
| Статус RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Logic Elements (LEs) | — | 16,640 |
| Maximum User I/O Pins | — | 492 |
| Embedded RAM | — | 425,984 bits |
| Maximum System Gates | — | Up to 1.5M gates (family-level) |
| Embedded System Blocks (ESBs) | — | Configurable as dual-port RAM / ROM / FIFO |
| Interconnect | — | MultiTrack, deterministic |
| I/O Standards | — | LVTTL, LVCMOS, LVDS, PCI, GTL+ (family-level) |
| PLLs | — | Yes (family-level, up to 4 per device) |
| Уровень MSL | — | [DATA_NEEDED: MSL rating] |
| Speed Grade | — | C (per suffix; specific speed bin [DATA_NEEDED]) |
| JTAG / Configuration | — | IEEE 1149.1 JTAG; passive serial / PS configuration supported (family-level) |