EP2A25F672C9 vs EP2A25F672C8 Сравнение
Подробное сравнение бок о бок EP2A25F672C9 от Altera и EP2A25F672C8 от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EP2A25F672C9 | EP2A25F672C8 |
|---|---|---|
| Бренд | Altera | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | NRND | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $700,00 | $951,18 |
| Family | APEX II | APEX II (EP2A25) |
| Logic Elements (LE) | Approximately 25,000 | — |
| Macro Cells | 2432 | — |
| User I/O | 492 | — |
| Корпус | 672-ball FCBGA (FineLine BGA) | 672-FBGA (FineLine BGA, 27x27 mm, 1.0 mm pitch) |
| Package Dimensions | 27 mm x 27 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | 0.15 microm CMOS, 8-layer copper interconnect |
| Logic Family | CMOS | — |
| Propagation Delay | 1.69 ns | — |
| Рабочая температура | 0°C to 85°C (Commercial) | 0 C to 85 C (commercial) |
| Напряжение питания | [DATA_NEEDED: core VCC voltage] | — |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V) | — |
| Configuration | Passive Serial, Passive Parallel Synchronous, JTAG | — |
| Embedded Memory | ESBs for dual-port RAM, ROM, FIFO | ESB blocks (dual-port RAM, FIFO, CAM, ROM) |
| Тип монтажа | Surface Mount | Surface Mount |
| Статус RoHS | [DATA_NEEDED] | Non-compliant (legacy product) |
| Logic Elements | — | 25,000 (typical gates) |
| Maximum System Gates | — | 40,960 |
| Macrocells / Embedded Logic | — | 2,432 macros |
| User I/O Count | — | 492 |
| Propagation Delay (tpd) | — | 1.69 ns |
| Speed Grade | — | C8 |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI-X, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL |
| LVDS Data Rate | — | 1 Gbps |
| PLL Count | — | 4 |
| I/O Banks | — | 16 |