EP610IPC-10 vs EP610DC-25 Сравнение
Подробное сравнение бок о бок EP610IPC-10 от Altera и EP610DC-25 от Rochester Electronics. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ АктивенСравнение характеристик
| Параметр | EP610IPC-10 | EP610DC-25 |
|---|---|---|
| Бренд | Altera | Rochester Electronics |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Obsolete | Активен |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $16,40 | $9,95 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Programmable Gates | 300 usable gates | — |
| Macrocells | 16 | 16 |
| Maximum Operating Frequency | 100 MHz | — |
| Propagation Delay (tPD) | 15 ns (commerical -10 grade) | — |
| Product Terms | 160 total | — |
| Dedicated Inputs | 4 | — |
| I/O Pins | 16 | — |
| Total Input Pins | 20 | — |
| Напряжение питания | 5 V | — |
| Architecture | Turbo-only AND-OR-NOT, PAL-type | — |
| Technology | CMOS EPROM (UV-erasable / OTP) | CMOS EPROM (UV-erasable) |
| Корпус | 24-pin PDIP (Plastic DIP) | 24-pin CDIP (Ceramic DIP, through-hole) |
| Рабочая температура | -40C to +85C (industrial) | 0 C to +70 C |
| Programming Method | Altera programming hardware (UV erase for I grade, OTP for C grade) | JEDEC fuse-map / UV-erase |
| TTL Emulation | 100% TTL compatible | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Equivalent Gates | — | 300 |
| Maximum Propagation Delay (tPD) | — | 25 ns |
| Pipelined Data Rate | — | Up to 100 MHz |
| Number of I/O Pins | — | 22 |
| Number of Dedicated Inputs | — | 4 |
| Total Pin Count | — | 24 |
| Тип монтажа | — | Through Hole |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Speed Grade Suffix | — | -25 (25 ns tPD) |