EP910ILC-15N vs EP910DC-15 Сравнение
Подробное сравнение бок о бок EP910ILC-15N от Altera и EP910DC-15 от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Altera
EP910ILC-15N - 450 Gate 24-Macrocell Classic CPLD, 15ns, 5V, 44-PLCC | Altera
EP910ILC-15N Obsolete
Сравнение характеристик
| Параметр | EP910ILC-15N | EP910DC-15 |
|---|---|---|
| Бренд | Altera | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Obsolete | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $9,85 | $10,75 |
| Family | Classic | Altera Classic EPLD |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Gates | 450 | — |
| Macro Cells | 24 | — |
| Maximum Propagation Delay (tPD) | 15 ns | 15 ns |
| Maximum Operating Frequency | 66.6 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (typical) |
| User I/O Pins | 36 | — |
| Dedicated Input Pins | 16 | — |
| Корпус | PLCC-44 (J-lead, surface mount) | 24-pin ceramic DIP (DC) |
| Тип монтажа | Surface Mount | Through-Hole |
| Рабочая температура | 0 C to +70 C (commercial) | 0C to +70C (commercial) |
| Process Technology | CMOS EPROM (one-time programmable) | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Статус RoHS | Compliant | [DATA_NEEDED: not explicitly stated in verified data] |
| Programming | EPROM / JTAG (Classic EP-series) | — |
| Device Density | — | 900 usable gates |
| Macrocells | — | 24 |
| Logic Elements | — | [DATA_NEEDED: exact LE count] |
| Dedicated Inputs | — | 12 |
| Bidirectional I/O Pins | — | 12 |
| Flip-Flops | — | 10 |
| Product Terms per Macrocells | — | 24 |
| Speed Grade | — | 15 |
| Technology | — | CMOS EPROM, UV-erasable |
| Уровень MSL | — | [DATA_NEEDED: MSL level] |