EP910PI-15T vs EP910PI-30T Сравнение
Подробное сравнение бок о бок EP910PI-15T от Altera и EP910PI-30T от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EP910PI-15T | EP910PI-30T |
|---|---|---|
| Бренд | Altera | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Obsolete | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $10,95 | $10,95 |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Family | Altera Classic EPLD (EP910 series) | Altera Classic EPLD |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 10 |
| I/O Pins | 24 | — |
| Logic Blocks | 6 LABs of 4 macrocells each (Classic architecture) | — |
| Напряжение питания | 4.5 V to 5.5 V (5 V nominal) | — |
| Propagation Delay (tPD) | 15 ns max (speed grade -15) | 30 ns |
| Technology | CMOS EEPROM (electrically erasable) | CMOS, UV-erasable (windowed ceramic) |
| Корпус | 40-pin PDIP (Plastic DIP, R-PDIP-T40) | — |
| Тип монтажа | Through-Hole | Through-Hole |
| Output Drive Current | [DATA_NEEDED: per-pin DC output current, mA] | — |
| Рабочая температура | [DATA_NEEDED: industrial/commercial temp range] | -40 C to +85 C (industrial) |
| Programming | JEDEC-standard, serial/parallel programmer | Altera Classic device programmer / MAX+PLUS II flow |
| Статус RoHS | [DATA_NEEDED: original Altera part; likely non-RoHS as 5V PDIP] | [DATA_NEEDED: RoHS status] |
| Usable Gates | — | 480 |
| Register (Clock-to-Output) Delay | — | 20 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Package Type | — | 40-pin PDIP (ceramic windowed) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |