EPC2TC32CAF48 vs EPC2TC32HAF48 Сравнение
Подробное сравнение бок о бок EPC2TC32CAF48 от Altera и EPC2TC32HAF48 от Intel. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Altera
EPC2TC32CAF48 - Altera/Intel Configuration Device for SRAM FPGAs | TQFP-48
EPC2TC32CAF48 ObsoleteСравнение характеристик
| Параметр | EPC2TC32CAF48 | EPC2TC32HAF48 |
|---|---|---|
| Бренд | Altera | Intel |
| Категория | FPGA & CPLD | Memory ICs |
| Статус жизненного цикла | Obsolete | NRND |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $9,85 | $15,20 |
| Тип памяти | Non-volatile Flash (configuration) | — |
| Размер памяти | 32 Mbit | 32 Mbit (4 Mbyte) |
| Configuration Interface | Altera serial (PS mode) | Altera EPC serial (DATA, DCLK, nCONFIG, nSTATUS, nCASC) |
| Supply Voltage (VCC) | 3.3 V | 3.3 V (typical) |
| JTAG Support | Yes (IEEE 1149.1 ISP) | — |
| Cascadable | Yes (up to 16 devices) | — |
| Target FPGA Series | APEX II, Mercury, Cyclone, Stratix, ACEX, APEX 20K | — |
| Корпус | TQFP-48 (CAF48) | TQFP-48 (7x7x1.0 mm) |
| Рабочая температура | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature grade] |
| Тип монтажа | Surface Mount | Surface Mount |
| Статус RoHS | Compliant | — |
| Lead Free | Yes | — |
| Уровень MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Programming Voltage | 3.3 V (in-system via JTAG) | — |
| Manufacturer | Altera (now Intel PSG) | — |
| Family | EPC2 (Enhanced Configuration Device, 2nd generation) | — |
| Функция | — | FPGA Configuration PROM for SRAM-based LUT devices |
| In-System Programmability | — | Yes, via JTAG (IEEE 1149.1) |
| Cascade Support | — | Yes, multi-device daisy-chain via nCASC |
| FPGA Compatibility | — | Altera/Intel Cyclone, Stratix, APEX, ACEX families |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free / RoHS status] |
| Programming Cycles | — | [DATA_NEEDED: program/erase endurance] |
| Configuration Clock (DCLK) | — | [DATA_NEEDED: maximum DCLK frequency] |
| Configuration Time (typical) | — | [DATA_NEEDED: configuration time] |