EPC8QI100 vs EPC8Q1100 Сравнение
Подробное сравнение бок о бок EPC8QI100 от Intel и EPC8Q1100 от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Altera
EPC8Q1100 - 8 Mbit Enhanced Config Device for SRAM FPGAs | Altera
EPC8Q1100 ⚠ Последняя закупкаСравнение характеристик
| Параметр | EPC8QI100 | EPC8Q1100 |
|---|---|---|
| Бренд | Intel | Altera |
| Категория | Memory ICs | FPGA & CPLD |
| Статус жизненного цикла | Obsolete | Последняя закупка |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $10,85 | $25,90 |
| Тип памяти | Flash (NOR, Enhanced Configuration PROM) | — |
| Размер памяти | 8 Mbit | — |
| Supply Voltage (Core) | 3.3 V | — |
| Supply Voltage (I/O) | 3.3 V | — |
| Интерфейс | Altera FPGA configuration serial/parallel (FPP) + JTAG (IEEE 1149.1) | — |
| In-System Programmability | IEEE Std. 1532 compliant | — |
| Programming Language | Jam STAPL | — |
| Boundary Scan | JTAG boundary-scan test supported | — |
| Data Compression | Yes (increases effective capacity) | — |
| Configuration Controller | On-chip, dedicated to Altera FPGAs | — |
| Initiate-Configuration Pin | nINIT_CONF (private JTAG instruction) | — |
| Рабочая температура | -40C to +85C (industrial) | -40 C to +85 C (industrial) |
| Корпус | 100-PQFP (20 x 14 mm) | 100-pin PQFP (plastic quad flat pack) |
| Тип монтажа | Surface Mount | — |
| Compatible FPGAs | Stratix, Stratix II, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, Cyclone, Cyclone II, Arria GX, Stratix GX, Stratix II GX | — |
| Статус RoHS | Non-compliant (legacy PQFP, lead-bearing) | [DATA_NEEDED: RoHS status] |
| Product Type | — | Enhanced Configuration Device (boot PROM) |
| Memory Density | — | 8 Mbit (8,388,608 bits) |
| Supported FPGAs | — | Altera SRAM-based LUT FPGAs (Cyclone, Stratix, APEX, ACEX, Mercury, Excalibur) |
| Configuration Interface | — | Altera Enhanced Config serial interface (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| Max DCLK Frequency | — | 33 MHz (Fast-mode) |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V |
| Supply Voltage (VCCIO for FPGA interface) | — | 1.8 V / 2.5 V / 3.3 V tolerant |
| Programming Interface | — | IEEE Std 1149.1 JTAG (ISP) + serial byte-blaster mode |
| In-System Programmable | — | Yes |
| Operating Current (active read) | — | [DATA_NEEDED: active ICC] |
| Standby Current | — | [DATA_NEEDED: ICC standby] |
| Endurance (program/erase cycles) | — | [DATA_NEEDED: endurance cycles] |
| Data Retention | — | [DATA_NEEDED: data retention years] |
| Lead-Free | — | [DATA_NEEDED: lead-free] |