EPF10K200SBC356-1 vs EPF10K200SBC356-2 Сравнение
Подробное сравнение бок о бок EPF10K200SBC356-1 от Intel и EPF10K200SBC356-2 от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Intel
EPF10K200SBC356-1 - 200K FLEX 10K FPGA, 274 I/O, 356-BGA | Intel / Altera
EPF10K200SBC356-1 NrndСравнение характеристик
| Параметр | EPF10K200SBC356-1 | EPF10K200SBC356-2 |
|---|---|---|
| Бренд | Intel | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | NRND | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $580,00 | $178,00 |
| Family | FLEX 10K (Classic embedded array) | FLEX 10KS (Embedded Programmable Logic) |
| Logic Elements / Cells | 9,984 | 9984 |
| Number of LABs / CLBs | 1,248 | — |
| Total RAM Bits | 98,304 | — |
| Equivalent Gate Count | 200,000 (system gates ~513,000) | — |
| Number of User I/Os | 274 | — |
| Propagation Delay | 0.4 ns (-1 speed grade) | 0.4 ns (per datasheet) |
| Core Supply Voltage | 2.375 V to 2.625 V | — |
| Рабочая температура | 0 °C to 70 °C (commercial) | 0C to +70C (Commercial) |
| Корпус | 356-LBGA (35 x 35 mm, 1.27 mm pitch) | 356-LBGA (FineLine BGA, 35 x 35 mm, 1.27 mm pitch) |
| Тип монтажа | Surface Mount | Surface Mount |
| Logic Family / Process | CMOS SRAM LUT | — |
| Configuration Method | SRAM (volatile) - requires configuration device or JTAG | — |
| Статус RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (legacy part) |
| Уровень MSL | [DATA_NEEDED: MSL level] | — |
| Series | — | FLEX 10KS |
| Logic Array Blocks (LABs) | — | 1248 |
| Embedded Memory Bits (EAB) | — | 98304 |
| System Gates | — | 200,000 |
| User I/Os | — | 274 |
| Number of I/O Banks | — | 8 |
| Supply Voltage (Core) | — | 2.5 V (2.375 V - 2.625 V) |
| I/O Voltage (PCI-compatible) | — | 3.3 V / 5.0 V tolerant |
| Process Technology | — | 0.22 um CMOS |
| Speed Grade | — | -2 |
| Configuration | — | SRAM-based (volatile, requires configuration device) |
| Boundary Scan | — | Yes (JTAG IEEE 1149.1) |
| PLL | — | Yes (on-chip) |