EPF10K200SBC356-1 vs EPF10K200SBC356-2 Comparaison
Comparaison détaillée côte à côte de EPF10K200SBC356-1 par Intel et EPF10K200SBC356-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPF10K200SBC356-1 - 200K FLEX 10K FPGA, 274 I/O, 356-BGA | Intel / Altera
EPF10K200SBC356-1 NrndComparaison des spécifications
| Paramètre | EPF10K200SBC356-1 | EPF10K200SBC356-2 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $580,00 | $178,00 |
| Family | FLEX 10K (Classic embedded array) | FLEX 10KS (Embedded Programmable Logic) |
| Logic Elements / Cells | 9,984 | 9984 |
| Number of LABs / CLBs | 1,248 | — |
| Total RAM Bits | 98,304 | — |
| Equivalent Gate Count | 200,000 (system gates ~513,000) | — |
| Number of User I/Os | 274 | — |
| Propagation Delay | 0.4 ns (-1 speed grade) | 0.4 ns (per datasheet) |
| Core Supply Voltage | 2.375 V to 2.625 V | — |
| Température de fonctionnement | 0 °C to 70 °C (commercial) | 0C to +70C (Commercial) |
| Boîtier | 356-LBGA (35 x 35 mm, 1.27 mm pitch) | 356-LBGA (FineLine BGA, 35 x 35 mm, 1.27 mm pitch) |
| Type de montage | Surface Mount | Surface Mount |
| Logic Family / Process | CMOS SRAM LUT | — |
| Configuration Method | SRAM (volatile) - requires configuration device or JTAG | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (legacy part) |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Series | — | FLEX 10KS |
| Logic Array Blocks (LABs) | — | 1248 |
| Embedded Memory Bits (EAB) | — | 98304 |
| System Gates | — | 200,000 |
| User I/Os | — | 274 |
| Number of I/O Banks | — | 8 |
| Supply Voltage (Core) | — | 2.5 V (2.375 V - 2.625 V) |
| I/O Voltage (PCI-compatible) | — | 3.3 V / 5.0 V tolerant |
| Process Technology | — | 0.22 um CMOS |
| Speed Grade | — | -2 |
| Configuration | — | SRAM-based (volatile, requires configuration device) |
| Boundary Scan | — | Yes (JTAG IEEE 1149.1) |
| PLL | — | Yes (on-chip) |