EPF8820ARC208-C vs EPF8820ARC208-3 Сравнение
Подробное сравнение бок о бок EPF8820ARC208-C от Altera и EPF8820ARC208-3 от Intel. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Intel
EPF8820ARC208-3 - FLEX 8000 FPGA, 8K Gates, 672 Cells | Intel / Altera
EPF8820ARC208-3 ObsoleteСравнение характеристик
| Параметр | EPF8820ARC208-C | EPF8820ARC208-3 |
|---|---|---|
| Бренд | Altera | Intel |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Obsolete | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $18,75 | $62,00 |
| Family | FLEX 8000 | FLEX 8000 (EPF8820) |
| Usable Gates | 8,000 | 8,000 |
| Logic Elements | 672 | — |
| Maximum User I/Os | 152 | — |
| Logic Array Blocks (LABs) | 8 to 16 LEs per LAB | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| I/O Voltage (VCCIO) | 3.3 V or 5.0 V (MultiVolt) | — |
| Process Technology | 0.42 um CMOS, 5 metal layers | 0.42 µm CMOS |
| Configuration Technology | CMOS SRAM (volatile) | — |
| Рабочая температура | 0 C to +70 C (commercial) | — |
| Корпус | 208-RQFP Exposed Pad (28x28 mm, 0.5 mm pitch) | — |
| Тип монтажа | Surface Mount | Surface Mount |
| In-Circuit Reconfigurability | Yes (ICR) | — |
| Boundary-Scan Support | Yes (IEEE 1149.1 JTAG) | — |
| Configuration Devices Supported | EPC1, EPC1213, EPC1064, EPC1441 | — |
| Статус RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Series | — | FLEX 8000 |
| Logic Cells / Elements | — | 672 |
| Registers | — | 152 |
| Maximum Operating Frequency | — | 125 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Configuration Memory | — | SRAM (volatile) |
| Корпус / Типоразмер | — | 208-BFQFP Exposed Pad (208-RQFP, 28x28 mm) |
| Supplier Device Package | — | 208-RQFP (28x28) |
| Packaging | — | Tray |
| Диапазон рабочих температур | — | [DATA_NEEDED: operating temperature range] |
| In-Circuit Reconfigurability (ICR) | — | Yes (via external configuration devices) |
| Boundary-Scan Test | — | JTAG (IEEE 1149.1) |
| I/O Tolerance | — | 3.3 V / 5 V |
| Clock Networks | — | 4 dedicated low-skew global clocks |
| Lead-Free / Finish | — | [DATA_NEEDED: lead-free finish] |