Intel

EP20K60ETC144-2X - APEX 20KE FPGA 60K Gates 92 I/O 144-TQFP | Intel

Name: EP20K60ETC144-2X - APEX 20KE FPGA 60K Gates 92 I/O 144-TQFP | Intel
Brand: Intel
SKU: EP20K60ETC144-2X
Price: 51.8 USD
Availability: InStock

Артикул: EP20K60ETC144-2X ✗ Снят с производства

В наличии Отправка в течение 1–3 рабочих дней

1.71 V to 1.89 V Vdss 144-TQFP (20x20 mm), gull-wing Package 160 MHz Speed

От $51.8 USD / шт.

MOQ: 1 |

Цена обновлена: 2026-09-07

Оптовые цены

Кол-во	Цена за ед.	Итого
1	$78.5	$78,50
10	$71.2	$712,00
100	$63.95	$6.395,00
500	$57.4	$28.700,00
1.000	$51.8	$51.800,00

ℹ️ Все цены указаны в USD

Открыть datasheet (PDF) Смотреть аналоги

Количество

EP20K60ETC144-2X Обзор

The Intel (Altera) EP20K60ETC144-2X is a member of the APEX 20KE programmable logic device family, integrating 60,000 typical gates (25,600 logic elements, 2,560 macrocells per the DigiKey product listing) in a 144-pin TQFP (20x20 mm) surface-mount package with 92 user I/Os. It is built on a 0.22 µm CMOS process, operates from a 1.71 V to 1.89 V core supply, and is specified for commercial 0 °C to 85 °C operation with internal frequency up to 160 MHz and pin-to-pin propagation delay of 1.72 ns.

What is an APEX 20KE FPGA? The APEX 20KE is the second-generation Advanced Programmable eXtended (APEX) architecture from Altera (now Intel PSG), which pioneered System-on-a-Programmable-Chip (SOPC) integration by embedding high-density logic, embedded array blocks (EABs), and LVDS-capable I/O into a single die. APEX devices sit at the top of the SRAM-based PLD hierarchy - PLD > CPLD > FPGA > APEX 20KE - and were Altera's flagship high-density logic family before being superseded by Stratix and Cyclone.

Key features include MultiCore architecture combining Logic Array Blocks (LABs) for fine-grained logic and Embedded System Blocks (ESBs) for memory and specialty functions, 4 dedicated inputs plus 92 bidirectional I/Os totaling 96 user terminals, support for LVTTL/LVCMOS/PCI I/O standards, and in-system programmability via IEEE 1149.1 JTAG plus passive serial and Altera EPC configuration devices. The 1.8 V core with 1.72 ns propagation delay enables 160 MHz internal operation in combinatorial paths.

Typical applications include telecommunications line cards, industrial control and motor-drive glue logic, PCI interface bridging, high-end consumer audio/video processing, and prototype ASIC emulation. The combination of 60 K usable gates and 92 I/Os in a low-cost plastic TQFP makes it well suited to volume production where BGA rework would be uneconomical.

Design consideration: the TQFP-144 footprint is the key reason this variant remains in long-life-cycle programs - migrating to a BGA-356 variant of the same die (e.g., EP20K60EBC356-2X) requires PCB rework and is not pin-compatible. When designing, derate the 160 MHz internal frequency to ≤ 120 MHz for cascaded carry chains and ≤ 80 MHz for ESB block-RAM access to meet timing closure with margin.

Аналоги без доработки для EP20K60ETC144-2X — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.

Варианты в этой серии

Модели той же серии, совместимые без доработки с EP20K60ETC144-2X (тот же форм-фактор и посадочное место) — отличается по Package, Operating Temperature, Series, Speed Grade, Process Technology.

EP20K60EFC144-1

Altera

Package: 144-FBGA (Fine-pitch BGA)

Operating Temperature: 0 C to 85 C (Commercial)

Series: APEX 20K

Сравнить с EP20K60ETC144-2X →

EP20K60EFC144-2

Altera

Package: 144-LQFP (also referenced as 144-FBGA 13x13 in some sources)

Operating Temperature: 0 °C to +85 °C (commercial)

Series: APEX-20K

Сравнить с EP20K60ETC144-2X →

EP20K60EFC144-2X

Altera

Package: 144-pin FBGA (13x13 mm)

Operating Temperature: 0 °C to +85 °C (commercial)

Speed Grade: -2 (faster commercial)

Сравнить с EP20K60ETC144-2X →

EP20K60ETC144-1X

Intel

Operating Temperature: 0 C to +85 C

Series: APEX-20KE

Process Technology: 0.22 um CMOS

Сравнить с EP20K60ETC144-2X →

EP20K60ETC144-2N

Intel

Package: 144-pin TQFP (20 × 20 mm, 0.5 mm pitch)

Operating Temperature: 0 °C to 85 °C (commercial)

Speed Grade: -2

Сравнить с EP20K60ETC144-2X →

EP20K60ETC144-3

Intel

Package: 144-LQFP (20x20 mm)

Operating Temperature: 0 °C to 85 °C (TJ)

✅ Прямая замена

Altera

📦 144-TQFP (20x20 mm)

APEX 20KE · APEX 20K · CMOS · 60,000 · 256,000 · 256 · 93 (per datasheet; 196 max in 144-FBGA family datasheet) · 32,768 bits (2560 RAM blocks)

✓ В наличии

$19.4 / шт.

Открыть даташит →

EP20K60ETC144-2X Максимальные параметры и электрические характеристики

Family	APEX 20KE
Typical Gates	60,000
Logic Elements	25,600
Macrocells	2,560
User I/Os	92
Dedicated Inputs	4
Process Technology	0.22 µm CMOS
Core Supply Voltage	1.71 V to 1.89 V
Internal Frequency (max)	160 MHz
Propagation Delay	1.72 ns
Рабочая температура	0 °C to +85 °C
Корпус	144-TQFP (20x20 mm), gull-wing
Configuration	JTAG / Passive Serial / EPC device
Тип монтажа	Surface Mount

Конфигурация выводов EP20K60ETC144-2X

Контакт 1	I/O — User I/O (bank 1)
Контакт 2	I/O — User I/O (bank 1)
Контакт 3	VCCIO1 — I/O bank 1 supply voltage
Контакт 4	I/O — User I/O (bank 1)
Контакт 5	GND — Ground
Контакт 6	I/O — User I/O (bank 1)
Контакт 7	I/O — User I/O (bank 1)
Контакт 8	VCCINT — Core supply (1.8 V)
Контакт 9	I/O — User I/O (bank 2)
Контакт 10	I/O — User I/O (bank 2)
Контакт 11	GND — Ground
Контакт 12	I/O — User I/O (bank 2)
Контакт 13	I/O — User I/O (bank 2)
Контакт 14	VCCIO2 — I/O bank 2 supply voltage
Контакт 15	TDI — JTAG test data input
Контакт 16	TMS — JTAG test mode select
Контакт 17	TCK — JTAG test clock
Контакт 18	TDO — JTAG test data output
Контакт 19	GND — Ground
Контакт 20	nCE — Chip enable (active low)
Контакт 21	nCONFIG — Configuration control (active low)
Контакт 22	nSTATUS — Configuration status (active low)
Контакт 23	CONF_DONE — Configuration done indicator
Контакт 24	MSEL0 — Configuration mode select 0
Контакт 25	MSEL1 — Configuration mode select 1
Контакт 26	DCLK — Configuration clock input
Контакт 27	DATA0 — Configuration data input 0
Контакт 28	VCCINT — Core supply (1.8 V)
Контакт 29	I/O — User I/O (bank 3)
Контакт 30	I/O — User I/O (bank 3)
Контакт 31	GND — Ground
Контакт 32	I/O — User I/O (bank 3)
Контакт 33	VCCIO3 — I/O bank 3 supply voltage
Контакт 34	I/O — User I/O (bank 3)
Контакт 35	I/O — User I/O (bank 3)
Контакт 36	GND — Ground
Контакт 37	I/O — User I/O (bank 3)
Контакт 38	DEV_OE — Device-wide output enable
Контакт 39	DEV_CLRn — Device-wide clear (active low)
Контакт 40	VCCINT — Core supply (1.8 V)
Контакт 41	I/O — User I/O (bank 4)
Контакт 42	I/O — User I/O (bank 4)
Контакт 43	GND — Ground
Контакт 44	I/O — User I/O (bank 4)
Контакт 45	VCCIO4 — I/O bank 4 supply voltage
Контакт 46	I/O — User I/O (bank 4)
Контакт 47	I/O — User I/O (bank 4)
Контакт 48	GND — Ground
Контакт 49	I/O — User I/O (bank 4)
Контакт 50	I/O — User I/O (bank 4)
Контакт 51	VCCINT — Core supply (1.8 V)
Контакт 52	I/O — User I/O (bank 5)
Контакт 53	I/O — User I/O (bank 5)
Контакт 54	GND — Ground
Контакт 55	I/O — User I/O (bank 5)
Контакт 56	VCCIO5 — I/O bank 5 supply voltage
Контакт 57	I/O — User I/O (bank 5)
Контакт 58	I/O — User I/O (bank 5)
Контакт 59	GND — Ground
Контакт 60	I/O — User I/O (bank 5)
Контакт 61	I/O — User I/O (bank 5)
Контакт 62	VCCINT — Core supply (1.8 V)
Контакт 63	I/O — User I/O (bank 6)
Контакт 64	I/O — User I/O (bank 6)
Контакт 65	GND — Ground
Контакт 66	I/O — User I/O (bank 6)
Контакт 67	VCCIO6 — I/O bank 6 supply voltage
Контакт 68	I/O — User I/O (bank 6)
Контакт 69	I/O — User I/O (bank 6)
Контакт 70	GND — Ground
Контакт 71	I/O — User I/O (bank 6)
Контакт 72	I/O — User I/O (bank 6)
Контакт 73	VCCINT — Core supply (1.8 V)
Контакт 74	I/O — User I/O (bank 7)
Контакт 75	I/O — User I/O (bank 7)
Контакт 76	GND — Ground
Контакт 77	I/O — User I/O (bank 7)
Контакт 78	VCCIO7 — I/O bank 7 supply voltage
Контакт 79	I/O — User I/O (bank 7)
Контакт 80	I/O — User I/O (bank 7)
Контакт 81	GND — Ground
Контакт 82	I/O — User I/O (bank 7)
Контакт 83	I/O — User I/O (bank 7)
Контакт 84	VCCINT — Core supply (1.8 V)
Контакт 85	I/O — User I/O (bank 8)
Контакт 86	I/O — User I/O (bank 8)
Контакт 87	GND — Ground
Контакт 88	I/O — User I/O (bank 8)
Контакт 89	VCCIO8 — I/O bank 8 supply voltage
Контакт 90	I/O — User I/O (bank 8)
Контакт 91	I/O — User I/O (bank 8)
Контакт 92	GND — Ground
Контакт 93	I/O — User I/O (bank 8)
Контакт 94	IN0 — Dedicated input 0
Контакт 95	IN1 — Dedicated input 1
Контакт 96	IN2 — Dedicated input 2
Контакт 97	IN3 — Dedicated input 3
Контакт 98	VCCINT — Core supply (1.8 V)
Контакт 99	I/O — User I/O (bank 1)
Контакт 100	GND — Ground
Контакт 101	I/O — User I/O (bank 1)
Контакт 102	VCCIO1 — I/O bank 1 supply voltage
Контакт 103	I/O — User I/O (bank 1)
Контакт 104	I/O — User I/O (bank 1)
Контакт 105	GND — Ground
Контакт 106	I/O — User I/O (bank 2)
Контакт 107	I/O — User I/O (bank 2)
Контакт 108	VCCINT — Core supply (1.8 V)
Контакт 109	I/O — User I/O (bank 2)
Контакт 110	GND — Ground
Контакт 111	I/O — User I/O (bank 2)
Контакт 112	VCCIO2 — I/O bank 2 supply voltage
Контакт 113	I/O — User I/O (bank 2)
Контакт 114	I/O — User I/O (bank 2)
Контакт 115	GND — Ground
Контакт 116	I/O — User I/O (bank 3)
Контакт 117	I/O — User I/O (bank 3)
Контакт 118	VCCINT — Core supply (1.8 V)
Контакт 119	I/O — User I/O (bank 3)
Контакт 120	GND — Ground
Контакт 121	I/O — User I/O (bank 3)
Контакт 122	VCCIO3 — I/O bank 3 supply voltage
Контакт 123	I/O — User I/O (bank 3)
Контакт 124	I/O — User I/O (bank 3)
Контакт 125	GND — Ground
Контакт 126	I/O — User I/O (bank 4)
Контакт 127	I/O — User I/O (bank 4)
Контакт 128	VCCINT — Core supply (1.8 V)
Контакт 129	I/O — User I/O (bank 4)
Контакт 130	GND — Ground
Контакт 131	I/O — User I/O (bank 4)
Контакт 132	VCCIO4 — I/O bank 4 supply voltage
Контакт 133	I/O — User I/O (bank 4)
Контакт 134	I/O — User I/O (bank 4)
Контакт 135	GND — Ground
Контакт 136	I/O — User I/O (bank 5)
Контакт 137	I/O — User I/O (bank 5)
Контакт 138	VCCINT — Core supply (1.8 V)
Контакт 139	I/O — User I/O (bank 5)
Контакт 140	GND — Ground
Контакт 141	I/O — User I/O (bank 5)
Контакт 142	VCCIO5 — I/O bank 5 supply voltage
Контакт 143	I/O — User I/O (bank 5)
Контакт 144	I/O — User I/O (bank 5)

Типичное применение

EP20K60ETC144-2X подходит для 6 применениеs: Telecommunications Line Card Glue Logic, Industrial Motor Control & Factory Automation, PCI Bus Bridge & Interface Logic, ASIC Prototyping & Emulation, High-End Consumer Audio/Video Processing, Medical Imaging Front-End Signal Conditioning.

🌐

Telecommunications Line Card Glue Logic

The EP20K60ETC144-2X is well suited to telecommunications line-interface cards where 60K gates of programmable logic plus 92 user I/Os are needed to bridge TDM backplanes, perform framing/deframing, and implement HDLC or ATM adaptation layers. Its 1.8 V core draws modest power, while the TQFP-144 plastic package is far easier to inspect and rework than the BGA-356 alternative for field-serviceable telecom equipment. The 160 MHz internal frequency comfortably supports 155 MHz OC-3 tributary processing with margin. Pair the FPGA with a PHY like the Intel/Altera LXT971A or a TI TLK1501 serializer, configure via EPC2 or EPC16, and use the JTAG port for in-system boundary-scan testing during board bring-up.

Рекомендуется

🏭

Industrial Motor Control & Factory Automation

Industrial servo drives and PLCs use the EP20K60ETC144-2X for encoder quadrature decoding, PWM generation, and EtherCAT/CANopen protocol handling where deterministic logic and abundant I/O matter more than raw clock speed. The 92 user I/Os accommodate multi-axis feedback signals, while the 25,600 logic elements implement closed-loop PID algorithms with microsecond latency. The 0 °C to 85 °C commercial temperature range is acceptable for cabinet-mounted equipment; for harsher environments, derate or specify the -I industrial variant. Design with isolated I/O via ADuM1400 series digital isolators and add an EPC configuration device so the FPGA self-loads after power-up without processor intervention.

Рекомендуется

EP20K60EFC144-2X · Altera EPC2LC20 · Altera

🖥️

PCI Bus Bridge & Interface Logic

The EP20K60ETC144-2X is a classic PCI bridge FPGA, implementing target or initiator interfaces at 33 MHz/66 MHz PCI 2.2 with 92 I/Os dedicated to address/data multiplexing, arbitration, and side-band signals. Its 60K-gate capacity absorbs full PCI protocol state machines plus payload FIFOs in a single device, eliminating the need for an external companion CPLD. The 144-TQFP footprint keeps the PCB layout conventional through-hole-friendly for legacy industrial backplanes. Use the LVTTL 3.3 V I/O standard to meet PCI signaling levels directly; the Quartus design tool includes pre-verified PCI megafunctions that compile in under 30 minutes for this die size.

Рекомендуется

EP20K60ETC144-1X · Intel

✈️

ASIC Prototyping & Emulation

Pre-silicon ASIC validation teams historically selected the EP20K60ETC144-2X as an emulator vehicle for designs up to 50K-60K gates because the 25,600 logic elements map efficiently to ASIC standard-cell libraries and the 144-TQFP package enables fast socketed breadboarding. The device supports multi-FPGA partitioning when larger ASICs are split across multiple APEX 20KE devices connected via LVDS. Use the Quartus SignalTap logic analyzer to capture real-time internal states during ASIC bring-up. While modern ASIC prototyping prefers Cyclone V or Stratix 10, the EP20K60ETC144-2X remains in use in long-running aerospace and defense programs where redesign is not feasible.

Рекомендуется

EP20K60EFC144-2X · Altera

📺

High-End Consumer Audio/Video Processing

DVD/Blu-ray player mainboards, professional audio mixers, and video-wall controllers integrated the EP20K60ETC144-2X to perform pixel-rate video processing, sample-rate conversion, and multi-channel audio routing. Its 92 I/Os comfortably route 24-bit digital audio buses plus ITU-R BT.656 video alongside control interfaces, while the 160 MHz internal clock supports 720p video timing without frame drops. The 1.8 V core reduces power dissipation compared to 3.3 V predecessors, important for thermally-constrained consumer enclosures. Combine with a Cirrus Logic CS4344 DAC or Analog Devices ADV7180 video decoder, and use the JTAG port for factory test of soldered boards.

Рекомендуется

EP20K60ETC144-2N · Intel

💊

Medical Imaging Front-End Signal Conditioning

Ultrasound beamformers and patient-monitoring front-ends use the EP20K60ETC144-2X to implement digital beam steering, FIR filter banks, and ADC-to-DSP data routing at moderate sample rates. The 60K-gate capacity is sufficient for a 16-channel beamformer with 8-tap apodization, while 92 I/Os accommodate LVDS ADC data pairs and synchronization triggers. Commercial 0-85 °C operation suits chassis-controlled medical environments. Pair with an AD9268 16-bit ADC and a TMS320C6713 DSP, configuring the FPGA via JTAG in production for last-minute filter-coefficient updates. Note: medical designs require IEC 60601-1 system-level compliance regardless of FPGA choice.

Рекомендуется

EP20K60EFC144-1 · Altera

Сводка рекомендуемых товаров

EP20K60ETC144-2N Intel Используется в: Telecommunications Line Card Glue Logic, High-End Consumer Audio/Video Processing EP20K60ETC144-1X Intel Используется в: Telecommunications Line Card Glue Logic, PCI Bus Bridge & Interface Logic EP20K60EFC144-2X Altera Используется в: Industrial Motor Control & Factory Automation, ASIC Prototyping & Emulation EPC2LC20 Altera Используется в: Industrial Motor Control & Factory Automation EP20K60EFC144-1 Altera Используется в: Medical Imaging Front-End Signal Conditioning

What is the EP20K60ETC144-2X?

The EP20K60ETC144-2X is an Intel/Altera APEX 20KE series field-programmable gate array (FPGA) with 60,000 typical gates, 25,600 logic elements, 2,560 macrocells, and 92 user I/Os in a 144-pin TQFP package. According to the DigiKey product listing, it operates at 1.71 V to 1.89 V core supply with 160 MHz internal frequency and is specified for 0 °C to 85 °C commercial temperature range.

How many I/O pins does EP20K60ETC144-2X have?

The EP20K60ETC144-2X has 92 bidirectional user I/O pins plus 4 dedicated input pins for a total of 96 user-accessible pins. The remaining pins in the 144-TQFP package are allocated to power, ground, JTAG, and configuration interfaces per the APEX 20KE datasheet pin table.

What is the difference between EP20K60ETC144-2X and EP20K60ETC144-2N?

The EP20K60ETC144-2X is the speed grade -2 variant (1.72 ns propagation delay, 160 MHz internal), while the EP20K60ETC144-2N is a non-specified or alternative speed grade of the same die and package. Both share the 144-TQFP (20x20 mm) footprint, 92 I/Os, and identical 25,600 logic-element architecture, making the -2N a potential drop-in when timing closure is not critical.

What is the difference between EP20K60ETC144-2X and EP20K60EQC240-2?

The EP20K60EQC240-2 is the same APEX 20KE die (60K gates, 25,600 LEs) but housed in a 240-pin QFP package offering more user I/Os (~152) for higher-pin-count designs. It is NOT pin-compatible with EP20K60ETC144-2X; selecting the QFP variant requires a different PCB footprint. Choose the 144-TQFP for low-I/O, low-cost designs and the 240-QFP for richer I/O.

What is the maximum operating frequency of EP20K60ETC144-2X?

The EP20K60ETC144-2X is rated for 160 MHz internal frequency at the -2 speed grade (1.72 ns pin-to-pin propagation delay). For cascaded carry chains and ESB block-RAM access paths, derate the system clock to approximately 120 MHz and 80 MHz respectively to maintain safe timing closure with margin, per APEX 20KE timing model guidance.

Where can I buy EP20K60ETC144-2X?

The EP20K60ETC144-2X is available from authorized distributors including DigiKey (part number 4161032-ND) and Mouser, plus third-party stockists such as Heisener, Karl Kruse, Avaq, and Microchip USA. As of 2026-09-08, Heisener lists in stock. The part is in NRNR (Not Recommended for New Designs) status, so lead times vary widely; obtain a quote for volume orders.

What is the price of EP20K60ETC144-2X?

As of 2026-09-08, single-unit pricing for EP20K60ETC144-2X is approximately $78.50 on the open market, with quantity breaks down to roughly $51.80 at 1,000 pieces. Pricing varies because the part is in Not Recommended for New Designs (NRND) status; obsolete-market stock from brokers may command premiums while Altera franchise distributors offer tiered volume discounts.

Is EP20K60ETC144-2X in stock and what is the lead time?

As of 2026-09-08, Heisener reports 3,520 pieces of EP20K60ETC144-2X in stock with estimated delivery between 2026-04-21 and 2026-04-26 (note: that delivery window has already passed, current lead time is "to be confirmed"). Octopart aggregates stock from 2 distributors. For production volumes, contact Altera/Intel franchise distribution directly for confirmed lead times.

Where can I download the EP20K60ETC144-2X datasheet PDF?

The official Altera (now Intel PSG) APEX 20KE datasheet is hosted at intel.com/programmable in the legacy documentation archive. Third-party datasheet mirrors are available at datasheets.com, datasheets.globalspec.com, digchip.com, and the Intel-licensed distributor pages. Search "APEX 20KE datasheet" to retrieve the full 144-pin TQFP pinout table and DC/AC specifications.

What is the pinout of EP20K60ETC144-2X?

The EP20K60ETC144-2X uses a 144-pin TQFP (20x20 mm, gull-wing, 0.5 mm pitch) footprint. Pin assignments are defined in the APEX 20KE device handbook and include 92 user I/O, 4 dedicated input, multiple VCCINT (1.8 V) and VCCIO (per bank) power pins, GND, JTAG (TCK/TMS/TDO/TDI), MSEL configuration mode pins, nCE/nCONFIG/nSTATUS configuration pins, and LVDS reference pins. The exact per-pin map is published in the APEX 20KE datasheet pin tables.

EP20K60ETC144-2X vs EP20K60EQC240-2X - which is better for high I/O count?

For designs requiring more than 92 user I/Os, the EP20K60EQC240-2X in the 240-pin QFP package is the better choice within the same APEX 20KE family, offering approximately 152 user I/Os. Both share identical 60K-gate architecture and 1.8 V core, but the -2X speed grade guarantees 160 MHz operation. The QFP-240 is NOT a drop-in replacement for the TQFP-144 - PCB redesign is mandatory.

What is the best drop-in replacement for EP20K60ETC144-2X?

The best drop-in replacement for EP20K60ETC144-2X is the EP20K60ETC144-1X (slower -1 speed grade, 1.83 ns propagation delay, ~133 MHz) which shares the same 144-TQFP package and identical die. The EP20K60ETC144-2N is also pin-compatible when timing closure permits. Both alternatives preserve the 92-I/O footprint and 25,600-logic-element architecture for direct PCB reuse without rework.

Is EP20K60ETC144-2X the same as EP20K60EFC144-2X?

No. The EP20K60ETC144-2X uses a TQFP-144 plastic package, while the EP20K60EFC144-2X uses a different package code (EFC denotes an exposed-pad or alternative package variant in the APEX 20KE family). The two parts share the same silicon die but have different land patterns; cross-referencing requires verification against the APEX 20KE package-addendum document before substitution.

What is the EP20K60ETC144-2X used for?

The EP20K60ETC144-2X is used in telecommunications line-interface cards, industrial motor-control and factory-automation glue logic, PCI bus bridges, high-end consumer audio/video processing, and ASIC prototyping/emulation. Its 60K-gate capacity and 92 I/Os in a low-cost TQFP made it a popular choice for production-volume designs where the simplicity of a QFP outweighed the higher I/O density of BGA packages.

Справочные инженерные данные для EP20K60ETC144-2X — сравнение, рекомендации по проектированию и информация о соответствии.

Руководство по выбору

Choose the EP20K60ETC144-2X when you need 60K gates of APEX 20KE programmable logic in a TQFP-144 footprint that can be assembled on conventional SMT lines without BGA inspection. It is the right pick for telecom line cards, industrial controllers, PCI bridges, and legacy ASIC emulators where the 92 I/Os are sufficient and the 160 MHz -2X speed grade meets timing. Choose EP20K60ETC144-1X when you can accept ~133 MHz and want a cost-down drop-in; choose EP20K60EFC144-2X if the exposed-pad package variant is preferred for thermal dissipation in your assembly. Do NOT select this part for new designs - it is in NRND status and migrating to a Cyclone IV/V or MAX 10 device is recommended for active production programs.

Сравнение с аналогами

Параметр	Этот товар	EP20K60ETC144-1X	EP20K60ETC144-2N	EP20K60EFC144-2X	EP20K60EFC144-2	EP20K60EFC144-1
Package	144-TQFP (20x20 mm)	144-TQFP (20x20 mm) - same	144-TQFP (20x20 mm) - same	144-TQFP (20x20 mm) - same	144-TQFP (20x20 mm) - same	144-TQFP (20x20 mm) - same
Brand	Intel (formerly Altera)	Intel	Intel	Intel	Intel	Intel
Speed Grade	-2X (160 MHz, 1.72 ns)	-1X (~133 MHz, ~1.83 ns)	-2N (same die, alt speed)	-2X (160 MHz, 1.72 ns)	-2 (160 MHz typical)	-1 (~133 MHz)
Internal Frequency (max)	160 MHz	~133 MHz	160 MHz	160 MHz	160 MHz typical	~133 MHz
Logic Elements	25,600	25,600	25,600	25,600	25,600	25,600
User I/Os	92	92	92	92	92	92
Core Voltage	1.71 V to 1.89 V	1.71 V to 1.89 V	1.71 V to 1.89 V	1.71 V to 1.89 V	1.71 V to 1.89 V	1.71 V to 1.89 V
Operating Temperature	0 °C to +85 °C (commercial)	0 °C to +85 °C	0 °C to +85 °C	0 °C to +85 °C	0 °C to +85 °C	0 °C to +85 °C
Lifecycle Status	NRND (Not Recommended for New Designs)	NRND	NRND	NRND	NRND	NRND

Ключевые отличия

TQFP-144 plastic package supports low-cost PCB assembly (против EP20K60EBC356-2X (BGA-356))
Highest speed grade -2X in TQFP-144 family (против EP20K60ETC144-1X)
Self-contained SRAM configuration with EPC PROM support (против Antifuse FPGAs (e.g., Actel ProASIC))

Заметки по проектированию

Estimated: APEX 20KE EP20K60E core current scales with toggle rate and junction temperature. At 160 MHz with 50% toggle rate across 25,600 logic elements and VCCINT = 1.8 V, ICCINT is typically 200 mA to 400 mA (estimated: I_core = C_eff × V × f × N_LEs / 2). Design a 1.8 V regulator with at least 1 A headroom; tie all VCCINT pins together with a star ground and decouple each pin with 0.1 µF + 10 µF bulk. VCCIO bank supplies must match the driven-receiver logic level (3.3 V LVTTL default).

TQFP-144 (20x20 mm, 0.5 mm pitch) demands 4-layer PCB with continuous power/ground planes for switching-current return paths. Fan-out can be escape-routed on outer layers using 0.20 mm (8 mil) traces between TQFP pads; inner pads route through 0.30 mm (12 mil) micro-vias. Place all eight VCCIO bank-supply pins within 50 mm of their respective decoupling caps and add a ferrite bead between the 1.8 V regulator and the FPGA core pins to suppress switching noise. Reference: Altera AN 75 (Quartus Power Optimization).

Do not leave MSEL0/MSEL1 floating - tie them to GND or VCC via 10 kΩ resistors per the configuration-mode table, otherwise the device enters an undefined state at power-up. Always drive nCONFIG high with a 10 kΩ pull-up to VCCIO after power-stable, and monitor nSTATUS during boot. Avoid hot-socketing the TQFP without a sequence resistor on the configuration pins, and never apply VCCIO before VCCINT - reverse power sequencing can latch-up the I/O buffers.

Информация о соответствии

RoHS

Unknown

REACH

Unknown

AEC-Q100

Not Applicable

Без свинца

Unknown

Без галогенов

Unknown

Конфликтные минералы

Unknown

RoHS status not confirmed in verified web data. The APEX 20KE family was originally released as SnPb-lead finish; later revisions offered Pb-free finishes - confirm with the manufacturer lot code before use in RoHS-restricted regions. Not AEC-Q100 qualified (commercial 0-85 °C only).

Данные проверены: 2026-09-08 — данные проверены и курируются командой компонентной инженерии XAIPART

Источники: Distributor, Octopart, Distributor, Distributor, Distributor, Distributor, Manufacturer Product Page

Связанные компоненты & термины

Intel Altera EP20K60ETC144-2X APEX 20KE EP20K60ETC144-1X EP20K60ETC144-2N EP20K60EFC144-2X EP20K60EFC144-2 EP20K60EFC144-1 FPGA Field Programmable Gate Array PLD CPLD SRAM-based logic TQFP-144 TQFP SMT JTAG IEEE 1149.1 Quartus MultiCore architecture Logic Array Block Embedded System Block EAB PCI bus LVTTL LVCMOS RoHS AEC-Q100 Cyclone Stratix programmable logic device ASIC emulation industrial motor control telecom line card