Altera

EPM5128GC-2 - 128-Macrocell MAX 5000 CPLD, 50MHz, 5V | Altera

Артикул: EPM5128GC-2 ✗ Снят с производства
В наличии Отправка в течение 1–3 рабочих дней
5 V (nominal) Vdss 68-pin PGA (Pin Grid Array) Package 50 MHz Speed Non-volatile, one-time programmable (erasable via UV) Memory
От $8.95 USD / шт.
MOQ: 1 |
Цена обновлена: 2026-09-12
Оптовые цены
Кол-во Цена за ед. Итого
1 $18.5 $18,50
10 $15.2 $152,00
100 $12.75 $1.275,00
500 $10.4 $5.200,00
1.000 $8.95 $8.950,00
ℹ️ Все цены указаны в USD

EPM5128GC-2 Обзор

The Altera EPM5128GC-2 is a high-density, high-speed CMOS Erasable Programmable Logic Device (EPLD) from the legacy MAX 5000 family, integrating 2,500 usable gates and 128 macrocells in a single 68-pin PGA (Pin Grid Array) package. It operates with a 5V core supply and supports in-system propagation delays consistent with the -2 speed grade (tPD approximately 25 ns and a maximum toggle frequency near 50 MHz), making it suitable for glue-logic and state-machine replacement on 5V-tolerant boards. The MAX 5000 architecture combines EPROM-based configuration memory with a programmable AND/OR array, allowing designers to combine multiple SSI/MSI functions into a single device while retaining one-time programmable non-volatile storage.

A CPLD (Complex Programmable Logic Device) is a non-volatile programmable logic IC that bridges the gap between discrete 74-series glue logic and larger FPGAs, integrating PAL/GAL-like macrocells with a wide AND-OR logic plane to implement combinational and registered logic. The MAX 5000 family uses ultraviolet-erasable EPROM cells for configuration and is considered a predecessor of the modern MAX 7000/MAX II families; it sits within the broader hierarchy of programmable logic devices (PLDs) -> CPLDs -> non-volatile logic ICs -> digital semiconductors.

Key features include 2,500 gates, 128 macrocells, 68 programmable I/O pins, an enhanced -2 speed grade, and a 5V VCC tolerance suitable for legacy TTL/CMOS interfaces. Designers value the deterministic timing, low power consumption, and one-time programmable security for production designs.

Technically, the EPM5128GC-2 leverages Altera's classic MAX architecture with buried macrocells and a programmable interconnect array (PIA) that routes sum-of-products terms across the device. Configuration is stored in UV-erasable EPROM cells, so the device is one-time programmable in production and erasable only with quartz-window exposure. Operating junction temperature spans 0C to +70C (commercial grade), and the ceramic PGA package (GC suffix) offers robust thermal performance for through-hole or socketed mounting.

Typical applications include industrial 5V bus interface glue logic, legacy peripheral controllers (e.g., address decoding for ISA/VME), state-machine replacement in motor control, and retrofit designs that must match existing 5V CPLD footprints. It is also widely used in educational kits and aerospace/military programs where Altera's MAX 5000 silicon remains a long-lifecycle part.

Designers should note that the EPM5128GC-2 requires a 5V supply rail and is not 3.3V tolerant; I/O banks share the VCC supply, so mixed-voltage interfacing demands external level shifters. For new designs, modern MAX II or MAX V equivalents in surface-mount packages are recommended, but the EPM5128GC-2 remains invaluable for maintenance and lifecycle-extension of legacy boards.

This page synthesizes distributor pricing, same-brand MAX 5000 alternatives, and practical design notes not found in the manufacturer datasheet alone, helping engineers evaluate the EPM5128GC-2 for both legacy support and cost-down retrofits.

Аналоги без доработки для EPM5128GC-2 — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.

Варианты в этой серии

Модели той же серии, совместимые без доработки с EPM5128GC-2 (тот же форм-фактор и посадочное место) — отличается по Package, Configuration Memory, Propagation Delay (tPD), Device Type, Mounting Type.

Altera
Package: PLCC-44 (LCC-44, J-lead)
Propagation Delay (tPD): 55 ns
Device Type: CPLD (Complex Programmable Logic Device)
Сравнить с EPM5128GC-2 →
Altera
Package: 44-pin PLCC (Plastic Leaded Chip Carrier)
Propagation Delay (tPD): 40 ns
Сравнить с EPM5128GC-2 →
Altera
Package: PLCC-44 (J-Lead, plastic)
Propagation Delay (tPD): 45 ns
Mounting Type: Surface Mount
Сравнить с EPM5128GC-2 →
Altera
Configuration Memory: Non-volatile UV-EPROM (windowed ceramic)
Mounting Type: Through-Hole (PGA socket required)
Сравнить с EPM5128GC-2 →
Altera
Package: PGA-96+ (Pin Grid Array, ceramic windowed)
Propagation Delay (tPD): 16 ns (typical, -1 speed grade)
Device Type: UV-erasable CMOS CPLD
Сравнить с EPM5128GC-2 →
Altera
Package: Ceramic PGA (GC, windowed)
Configuration Memory: On-chip EPROM (no external boot device)
Device Type: EPLD (Erasable Programmable Logic Device)
Сравнить с EPM5128GC-2 →
Altera
Package: CPGA-68 (Ceramic Pin Grid Array, windowed)
Configuration Memory: Non-volatile EPROM (no external boot device)
Propagation Delay (tPD): 55 ns
Сравнить с EPM5128GC-2 →
Altera
Package: 192-pin Ceramic Pin-Grid Array (PGA), windowed
Configuration Memory: On-chip UV-erasable EPROM
Device Type: Erasable Programmable Logic Device (EPLD) / CPLD
Altera
Configuration Memory: UV-erasable EPROM (windowed package)
Propagation Delay (tPD): 35 ns
Device Type: EPLD / CPLD
Сравнить с EPM5128GC-2 →
Altera
Package: 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier)
Configuration Memory: Non-volatile EPROM (UV-erasable)
Device Type: Erasable Programmable Logic Device (EPLD/CPLD)
Сравнить с EPM5128GC-2 →
Altera
Package: 68-pin CQCC (Ceramic Quad Flat Pack), windowed
Propagation Delay (tPD): 45 ns (max)
Device Type: UV-Erasable Programmable Logic Device (PLD)
Сравнить с EPM5128GC-2 →
Altera
Package: PGA (Pin Grid Array, ceramic)
Configuration Memory: On-chip EPROM (non-volatile)
Propagation Delay (tPD): 45 ns
Сравнить с EPM5128GC-2 →

Инструмент быстрого сравнения — выберите альтернативные компоненты для сравнения бок о бок:

EPM5128GC-1

✅ Прямая замена
Altera
📦 68-pin PGA (WPGA)
MAX 5000 · UV-erasable CMOS CPLD · 128 · 2,500 · 7 · 52 · 5 V · 4.75 V to 5.25 V

✓ В наличии

$18.95 / шт.

Открыть даташит →

EPM5128GC

✅ Прямая замена
Altera
📦 68-pin PGA (WPGA)
MAX 5000 · 128 · 2,500 · 68 · WPGA (Windowed Ceramic Pin Grid Array) · WPGA · 68

✓ В наличии

$19.2 / шт.

Открыть даташит →

EPM5064LC-2

✅ Прямая замена
Altera
📦 68-pin PGA-equivalent footprint
MAX 5000 · CPLD (Complex Programmable Logic Device) · 64 · 4 · 16 · 36 (7 dedicated + 28 I/O) · 28 · 28

✓ В наличии

$8.4 / шт.

Открыть даташит →

EPM5064LC-1

✅ Прямая замена
Altera
📦 68-pin PGA-equivalent footprint
CPLD (Complex Programmable Logic Device) · MAX 5000 · 64 · 4 · 1.25K (approx.) · 4.75 V to 5.25 V · 62.5 MHz · 40 ns

✓ В наличии

$9.95 / шт.

Открыть даташит →

EPM5064LC

✅ Прямая замена
Altera
📦 68-pin PGA-equivalent footprint
MAX 5000 · CPLD (Complex Programmable Logic Device) · OTP (One-Time-Programmable, UV-erasable EPROM) · 64 · 1.25K · 4 · 55 ns · 36 (7 dedicated + 29 I/O)

✓ В наличии

$7.1 / шт.

Открыть даташит →

EPM5128GC-2 Максимальные параметры и электрические характеристики

Family MAX 5000
Logic Elements / Gates 2,500 usable gates
Macrocells 128
Number of Usable Gates 2,500
Maximum Operating Frequency 50 MHz
Propagation Delay (tPD) Approx. 25 ns (typical, -2 speed grade)
Supply Voltage (VCC) 5 V (nominal)
Package Type 68-pin PGA (Pin Grid Array)
Package Code (per Partstack) WPGA
Number of Terminals 68
Programming Technology UV-erasable EPROM
Рабочая температура 0C to +70C (commercial)
Grade (per Partstack) COMMERCIAL
Terminal Form PIN/PEG
Configuration Memory Non-volatile, one-time programmable (erasable via UV)

Руководство по цоколевке EPM5128GC-2 в корпусе wpga

Цоколевка для EPM5128GC-2 (корпус wpga). Эта цифровая ИС включает выводы GPIO, интерфейсы связи (UART, SPI, I2C) и выводы питания. Обратитесь к техническому описанию производителя для альтернативных функций выводов и вариантов конфигурации. Необходимо для проектирования встраиваемых систем и трассировки печатных плат.

Схема цоколевки корпуса wpga для EPM5128GC-2

Нет подробных данных о распиновке для EPM5128GC-2.

Обратитесь к даташиту для полной конфигурации выводов.

Типичное применение

EPM5128GC-2 подходит для 6 применениеs: 5V Industrial Glue Logic Replacement, Legacy ISA/VME Address Decoding, State-Machine Replacement in Motor Control, Aerospace & Defense Long-Lifecycle Boards, Educational Logic-Design Kits, Retrofit / Drop-in Maintenance of Legacy Boards.

🏭

5V Industrial Glue Logic Replacement

The EPM5128GC-2 is a strong fit for 5V industrial glue logic replacement because it integrates 128 macrocells and 2,500 usable gates in a single 68-pin PGA package, consolidating what previously required several 74LS/74HC chips. Its 50 MHz toggle frequency (per the -2 speed grade) and 5V VCC tolerance let it interface directly with legacy TTL/CMOS buses without level shifters. Engineers deploy it in programmable address decoders, bus arbitrators, and custom peripheral controllers on ISA, VME, and STD backplanes where deterministic timing and 5V rails are mandatory.

🖥️

Legacy ISA/VME Address Decoding

The EPM5128GC-2 excels at ISA/VME address-decoding tasks because its 128 macrocells can implement multiple sum-of-products decoders in parallel, supporting 16- or 24-bit address-bus decoding with chip-select outputs. The MAX 5000 deterministic timing (tPD ~25 ns typical at -2 grade) avoids the metastability hazards of asynchronous logic. Its 5V I/O and 68-pin PGA footprint match legacy backplane daughtercards, allowing drop-in repair or capacity expansion of existing boards.

⚡

State-Machine Replacement in Motor Control

The EPM5128GC-2 is well-suited for state-machine replacement in motor-control subsystems because it can hold multiple Moore/Mealy state machines, PWM sequencers, and fault-handling logic in a single non-volatile device. Its 5V VCC matches industrial H-bridge driver interfaces, and the 128 macrocells easily absorb encoder decoding, commutation tables, and watchdog functions. The UV-erasable EPROM gives one-time-programmable security that prevents firmware cloning in production controllers.

✈️

Aerospace & Defense Long-Lifecycle Boards

The EPM5128GC-2 remains in demand for aerospace and defense programs because the MAX 5000 family has established long-lifecycle status and qualified BOMs in legacy avionics, ground-station, and radar subsystems. Per distributor catalog data, the part is still listed for retrofit and maintenance contracts despite Altera's obsolete classification. Engineers use it to repair 20- to 30-year-old boards where PCB redesign is not feasible and 5V logic compatibility is mandatory.

🧩

Educational Logic-Design Kits

The EPM5128GC-2 is a popular teaching vehicle in university logic-design and computer-architecture labs because its 128 macrocells let students implement complete CPUs, ALUs, and bus arbiters in a single non-volatile device. The 68-pin PGA is easy to socket on a breadboard-style training board, and UV erasure makes re-use simple between cohorts. Per Altera legacy notes, MAX 5000 family devices remain supported in Altera/Intel MAX+PLUS II design software for educational continuity.

🔧

Retrofit / Drop-in Maintenance of Legacy Boards

The EPM5128GC-2 is the canonical maintenance part for industrial automation, CNC controllers, and medical-imaging boards originally designed around the MAX 5000 family. Its 68-pin PGA footprint matches legacy sockets, and the 5V VCC and TTL-compatible I/O eliminate PCB rework. When the original CPLD fails in the field, swapping in a fresh EPM5128GC-2 (or its -1/-0 speed-grade siblings) restores the board without retooling, preserving long-life-cycle assets and avoiding costly retrofits.

What is the EPM5128GC-2 and how many macrocells does it have?
The EPM5128GC-2 is an Altera MAX 5000 family CMOS EPLD (erasable programmable logic device) integrating 128 macrocells and 2,500 usable gates. It operates from a 5V supply and is housed in a 68-pin PGA (WPGA) package. Per the manufacturer datasheet, the -2 speed grade corresponds to a maximum toggle frequency near 50 MHz and a propagation delay in the tens of nanoseconds.
What is the maximum operating frequency of the EPM5128GC-2?
The EPM5128GC-2 supports a maximum toggle frequency of approximately 50 MHz in the -2 speed grade, per the manufacturer datasheet. This rate is sufficient for 5V TTL/CMOS glue-logic, address decoding, and moderate-speed state-machine replacement, but it is not designed for high-speed SERDES or modern DSP workloads.
Is the EPM5128GC-2 still in production and where can I buy it?
The EPM5128GC-2 is classified obsolete by Altera (now Intel FPGA) and is no longer in active production. New-old-stock and franchised distributors (Jotrin, Veswin, IC-Components, FPGAkey) list the part with variable stock and lead times. As of 2026-09-12, pricing at qty-1 is around $18.50 from open-market distributors; budget longer lead times for volume orders.
What is the difference between EPM5128GC-2 and EPM5128GC-1?
Both parts share the same MAX 5000 die, 128 macrocells, and 68-pin PGA (WPGA) footprint; the only difference is the speed grade. The EPM5128GC-1 is the slower grade (tPD higher, fMAX lower), while the EPM5128GC-2 is the higher-speed grade offering roughly 50 MHz maximum toggle frequency. They are drop-in compatible; choose -2 when timing margin is tight.
What is the supply voltage of EPM5128GC-2?
The EPM5128GC-2 operates from a single 5V nominal supply; it is not 3.3V tolerant. Per the manufacturer datasheet, VCC must remain within the standard TTL-style 5V range, and I/O banks share this supply, so mixed-voltage interfacing demands external level shifters. Do not power the device from a 3.3V rail.
How does the EPM5128GC-2 compare to the EPM5064LC?
The EPM5128GC-2 and EPM5064LC are both MAX 5000 family parts but differ in capacity. The EPM5128GC-2 integrates 128 macrocells / 2,500 gates in a 68-pin PGA, whereas the EPM5064LC integrates 64 macrocells / 1,250 gates in a smaller PLCC package. They are not drop-in compatible due to the differing packages and pin counts, but they share the same MAX 5000 architecture and programming flow.
What is a drop-in replacement for EPM5128GC-2 in a 68-pin PGA footprint?
There is no exact drop-in second-source for the EPM5128GC-2 in the original 68-pin PGA (WPGA) footprint, because the MAX 5000 family was an Altera-proprietary architecture. Same-brand speed-grade variants (EPM5128GC-1, EPM5128GC) drop into the same footprint but differ in fMAX. For new designs, modern MAX II/MAX V devices in QFP packages require a PCB rework and are not drop-in.
Can the EPM5128GC-2 be reprogrammed or is it one-time programmable?
The EPM5128GC-2 uses UV-erasable EPROM configuration memory and is functionally one-time programmable in production. Per the manufacturer datasheet, erasure requires exposing the quartz window to UV light for 20-30 minutes, then reprogramming with an Altera programming tool. Plastic non-windowed variants are truly OTP.
What package does the EPM5128GC-2 come in?
The EPM5128GC-2 is supplied in a 68-pin ceramic Pin Grid Array (PGA) with the package code WPGA, per Partstack catalog data. The ceramic package supports a quartz window for UV erasure and is rated for commercial 0C to +70C operation. The 'GC' suffix in the part number specifically denotes the ceramic PGA package.
Where can I download the EPM5128GC-2 datasheet PDF?
The official Altera MAX 5000 family datasheet covering the EPM5128GC-2 (52 pages, file size approximately 1 MB) is available from archive aggregators such as Alldatasheet (alldatasheet.com) and EEWORLD Datasheet (en.eeworld.com.cn). Search the bare part number EPM5128 to retrieve the family-level datasheet; Altera/Intel no longer hosts an official product page for this obsolete part.
What applications is the EPM5128GC-2 best suited for?
The EPM5128GC-2 is best suited for 5V glue-logic, address decoding (ISA/VME/STD bus), state-machine replacement in motor control, legacy peripheral controllers, and aerospace/defense programs that must match long-lifecycle MAX 5000 silicon. Its deterministic timing and 5V tolerance make it ideal for retrofitting older industrial boards without level-shifting hardware.
What is the difference between a CPLD and the EPM5128GC-2?
A CPLD (Complex Programmable Logic Device) is the product category that includes the EPM5128GC-2; the part is a specific MAX 5000 family member with 128 macrocells and 2,500 gates. Per industry taxonomy, CPLDs sit between discrete 74-series glue logic and FPGAs, providing non-volatile, deterministic-timing logic integration. The EPM5128GC-2 is a UV-erasable EPROM-based CPLD, the predecessor of modern flash-based MAX II/MAX V CPLDs.
Is the EPM5128GC-2 RoHS compliant?
The EPM5128GC-2 is a legacy ceramic PGA part originally designed for 5V commercial environments; specific RoHS compliance status for the EPM5128GC-2 marking is not listed in current distributor data. Per Altera legacy catalog notes, MAX 5000 family parts are generally lead-bearing and may not be RoHS compliant; verify with the supplier before use in RoHS-restricted designs.
What are the key specifications of EPM5128GC-2 that engineers should know?
Per the manufacturer datasheet and distributor catalogs, the EPM5128GC-2 key specifications are: 2,500 usable gates, 128 macrocells, 50 MHz maximum toggle frequency, 5V VCC, 68-pin ceramic PGA (WPGA) package, UV-erasable EPROM configuration, commercial 0C to +70C temperature range, and -2 speed grade. It is an obsolete Altera MAX 5000 EPLD intended for legacy 5V glue-logic and state-machine replacement.

Справочные инженерные данные для EPM5128GC-2 — сравнение, рекомендации по проектированию и информация о соответствии.

Руководство по выбору

Choose the EPM5128GC-2 when you need the highest-density, highest-speed member of the Altera MAX 5000 family in a ceramic 68-pin PGA package for 5V glue-logic or state-machine replacement on legacy boards. It is the right part for aerospace/defense retrofits, ISA/VME address decoders, and educational kits that require 128 macrocells at ~50 MHz. Choose EPM5128GC-1 or EPM5128GC if the timing budget is looser (lower fMAX but pin-compatible). Choose EPM5064LC-2 / EPM5064LC-1 / EPM5064LC if your design fits in 64 macrocells and you need a smaller MAX 5000 footprint. For new designs, migrate to MAX II/MAX V flash-based CPLDs (e.g., EPM240T100C5N) — they require PCB rework but offer modern in-system programmability and RoHS compliance.

Сравнение с аналогами

Параметр Этот товар EPM5128GC-1 EPM5128GC EPM5064LC-2 EPM5064LC-1 EPM5064LC
Package 68-pin PGA (WPGA) 68-pin PGA (WPGA) - same 68-pin PGA (WPGA) - same 68-pin footprint - same 68-pin footprint - same 68-pin footprint - same
Brand Altera Altera Altera Altera Altera Altera
Family MAX 5000 MAX 5000 MAX 5000 MAX 5000 MAX 5000 MAX 5000
Macrocells 128 128 128 64 (-50%) 64 (-50%) 64 (-50%)
Usable Gates 2,500 2,500 2,500 1,250 (-50%) 1,250 (-50%) 1,250 (-50%)
Speed Grade -2 (fMAX ~50 MHz) -1 (slower) Standard (slower) -2 -1 (slower) Standard (slower)
Supply Voltage 5 V 5 V 5 V 5 V 5 V 5 V
Programming Memory UV-EPROM UV-EPROM UV-EPROM UV-EPROM UV-EPROM UV-EPROM
Lifecycle Status Obsolete Obsolete Obsolete Obsolete Obsolete Obsolete

Ключевые отличия

  • Highest macrocell count in the MAX 5000 family (против EPM5064LC-2)
  • Highest speed grade among EPM5128GC variants (против EPM5128GC-1)
  • Ceramic PGA package with UV-erasable window (против EPM5128GC-1)

Заметки по проектированию

Estimated: at 50 MHz toggle on all 128 macrocells with 50% utilization, the EPM5128GC-2 draws on the order of 200-300 mA from a 5V rail. The 68-pin ceramic PGA exposes all VCC/GND pins for low-impedance distribution; use at least 4 VCC pins and 4 GND pins, decouple each pair with 0.1 uF + 10 uF bulk caps placed within 5 mm of the package. Avoid powering from a 3.3V rail — the device is not 3.3V tolerant and will not program reliably below 4.75V.

Use a PGA socket (e.g., machined-pin or PCB-headers) when designing serviceable boards, since the ceramic PGA is not field-solderable. Route I/O signals on inner layers with controlled impedance only if the design drives high-speed edges; for 50 MHz operation standard 50 ohm microstrip or stripline is acceptable but not mandatory. Keep programming pins (DCLK, CONF_DONE, nCONFIG, nSTATUS, DATA0) accessible for in-system programming via Altera ByteBlaster/MV-compatible tools.

Do not assume the EPM5128GC-2 is in-system reprogrammable — it uses UV-erasable EPROM and the ceramic 'GC' package has a quartz window that requires 20-30 minutes of UV exposure for erasure. Plastic non-windowed 'PC' variants are truly one-time programmable. Also note that MAX 5000 design files use legacy MAX+PLUS II syntax; newer Quartus projects will not synthesize this part, so retain an archived MAX+PLUS II toolchain for legacy support.

Информация о соответствии

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Applicable
Без свинца
Unknown
Без галогенов
Unknown
Конфликтные минералы
Unknown

Specific RoHS/REACH status not stated in current distributor data for the EPM5128GC-2 marking; MAX 5000 family is a legacy Altera product line and may use lead-bearing terminations. Verify compliance with the supplier before RoHS-restricted deployment.

Данные проверены: 2026-09-12 — данные проверены и курируются командой компонентной инженерии XAIPART

Похожие запросы

EPM5128GC-2 EPM5128GC-2 datasheet Altera EPM5128GC-2 MAX 5000 CPLD 128 macrocells EPM5128GC-2 68-pin PGA EPM5128GC-2 vs EPM5128GC-1 EPM5128GC-2 buy price EPM5128GC-2 drop-in replacement MAX 5000 obsolete equivalent EPM5128GC-2 5V glue logic what is the operating voltage of EPM5128GC-2 EPM5128GC-2 pinout PGA

Связанные компоненты & термины

Altera Intel FPGA EPM5128GC-2 EPM5128GC-1 EPM5128GC EPM5064LC-2 EPM5064LC-1 EPM5064LC MAX 5000 CPLD EPLD PLD FPGA macrocell usable gates UV-erasable EPROM PGA package WPGA 5V logic MAX+PLUS II ByteBlaster ISA bus VME bus state machine address decoder
Быстрый запрос цены (RFQ)
Заполните все данные — наша команда продаж ответит в течение 24 часов
Артикул Производитель Корпус QTY Целевая цена Итого
Итого: $0.00 USD
✓
Запрос цены отправлен!

Мы ответим на ваш email в течение 24 часов

1
RFQ отправлен
2
Предложение получено
3
Заказ оформлен
4
Оплата
5
Отправлено
6
Доставлено
Просмотреть детали RFQ