10AS032E4F27I3SG vs 10AS032E4F27I3LG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AS032E4F27I3SG sa pamamagitan ng Intel at 10AS032E4F27I3LG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
10AS032E4F27I3SG - Arria 10 SX SoC FPGA, 320K LE, 672-FBGA | Intel
10AS032E4F27I3SG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 10AS032E4F27I3SG | 10AS032E4F27I3LG |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Arria 10 SX | — |
| Device Family | Arria 10 SX SoC FPGA | — |
| Logic Elements | 320,000 | 320,000 |
| Hard Processor System | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Clock Frequency | Up to 1.5 GHz | 1.5 GHz |
| Process Technology | 20 nm | 20 nm |
| Core Voltage (typ.) | 0.9 V | — |
| Packhaging | 672-pin FCBGA (Flip-Chip BGA), 27 x 27 mm | 672-pin FCBGA (F27, 27x27 mm) |
| Terminal Form | Ball | — |
| Number of Terminals | 672 | — |
| Operating Temperature Grade | Industrial (-40C to +100C junction) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Compliance / Lead-Free | RoHS compliant, lead-free | — |
| Katayuan ng Lifecycle | Active | — |
| FPGA Architecture | SRAM-based, volatile configuration | — |
| Family | — | Arria 10 SX SoC FPGA |
| Hard Processor Subsystem (HPS) | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Speed Grade | — | E4 (-4, mid-tier) |
| Temperature Grade | — | Industrial (-40C to +100C) |
| Tindminan RoHS | — | Compliant |
| Lead-Free | — | Yes |
| Level ng MSL | — | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] |
| Transceivers | — | Up to 24 channels, up to 14.1 Gbps (family-level) |
| DSP Blocks | — | Hardened floating-point DSP (family-level) |
| Memory Interfaces | — | DDR3 / DDR4 with hard controllers (family-level) |
| Configuration Method | — | JTAG, ASx4, FPP (family-level) |