10AS057K2F35I1HG vs 10AS057K2F35E2LG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AS057K2F35I1HG sa pamamagitan ng Intel at 10AS057K2F35E2LG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
10AS057K2F35I1HG - Arria 10 SX SoC FPGA, 570K LE, 1152-FCBGA | Intel
10AS057K2F35I1HG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 10AS057K2F35I1HG | 10AS057K2F35E2LG |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Family | Arria 10 SX SoC FPGA | — |
| Logic Elements | 570K | 570,000 |
| Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Fabric Frequency | 1.5 GHz | — |
| User I/O Count | 396 | — |
| Packhaging | 1152-FBGA, FC (35x35 mm) | 1152-ball FCBGA, 35 mm x 35 mm, 1.0 mm pitch |
| Speed Grade | K2 (mid) | E2 (commercial/extended) |
| Temperature Grade | Industrial (I1: -40C to +100C) | — |
| Uri ng Pagpapasok | Surface Mount (Flip-Chip BGA) | — |
| Process Node | 20 nm | TSMC 20 nm |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: 18x19 multiplier count] |
| Embedded Memory | M20K blocks | — |
| Transceivers | [DATA_NEEDED: transceiver count and data rate] | Up to 24 channels, up to 17.4 Gbps |
| Hard Memory Controllers | DDR4 with hard PHY | — |
| PCIe Hard IP | PCI Express Gen3 | Gen3 x4 (rootport/endpoint) |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Family | — | Arria 10 SX SoC FPGA |
| HPS Cores | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Max Frequency | — | 1.5 GHz |
| Embedded Memory (M20K) | — | [DATA_NEEDED: M20K block count and total bits] |
| User I/Os | — | 396 |
| Temperature na Operasyon | — | -40C to +100C (extended-industrial screening) |
| Configuration | — | SRAM-based, partial reconfiguration, SEU mitigation, ECC |
| Memory Interfaces | — | DDR3/DDR4 with hard PHY (HPS + FPGA) |