10AS066H3F34I2LG vs 10AS066H3F34E2LG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AS066H3F34I2LG sa pamamagitan ng Altera at 10AS066H3F34E2LG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
10AS066H3F34E2LG - Arria 10 SX SoC FPGA, 660K LE, Dual A9 | Intel
10AS066H3F34E2LG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 10AS066H3F34I2LG | 10AS066H3F34E2LG |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Product Type | System-on-chip FPGA | — |
| FPGA Family | Arria 10 SX | — |
| Logic Elements | 660000 | 660,000 |
| Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Stated Frequency | 1.5 GHz | — |
| I/O Count | 492 I/O | — |
| Technology | 20 nm | — |
| Core Voltage Snippet | 0.9 V | — |
| Cell Count | 660000 cells | — |
| Package Pin Count | 1152 pins | — |
| Package Type | FCBGA | — |
| Package Dimensions | 35 mm x 35 mm | — |
| Terminal Form | Ball | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature Grade | Industrial | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Family | — | Arria 10 SX |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Process Technology | — | 20 nm |
| Core Voltage | — | 0.9 V |
| Maximum Core Frequency | — | 1.5 GHz |
| Packhaging | — | 1152-ball FCBGA (F34), 35 mm x 35 mm |
| Memory Controllers | — | Hard DDR3/DDR4 PHY (per Arria 10 SoC datasheet) |
| Transceivers | — | Up to 24 multi-gigabit transceivers (family-level) |
| Operating Temperature Grade | — | Industrial (per F34 ordering code) |
| Device Type | — | System-on-Chip FPGA (SoC) |
| Lead-Free | — | Yes |
| Configuration Image Support | — | Dual configuration, partial reconfiguration (family-level) |