10CL055YF484I7G vs 10CL055YU484C6G Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng 10CL055YF484I7G sa pamamagitan ng Intel at 10CL055YU484C6G sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro 10CL055YF484I7G 10CL055YU484C6G
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Aktibo
Series Cyclone 10 LP —
Family Cyclone® 10 LP Cyclone 10 LP
Logic Elements (LE) 55,856 55,856
Embedded Memory (bits) 2,396,160 —
Number of Logic Array Blocks (LAB) 3,478 —
Number of M9K Memory Blocks 260 —
Embedded Multipliers (18x18) 156 —
Maximum User I/Os 321 321
Number of PLLs 4 —
Global Clock Networks 20 —
Temperature na Operasyon -40C to +100C (Industrial) 0 C to +85 C (commercial, C suffix)
Speed Grade I7 6 (commercial, slowest in family)
Packhaging 484-BGA (FBGA, FineLine BGA) 484-pin UBGA (19 mm x 19 mm)
Uri ng Pagpapasok Surface Mount Surface Mount
Configuration Method Active Serial (AS), Passive Serial (PS), JTAG —
Core Voltage 1.2 V 1.0 V (typical)
Auxiliary Voltage 2.5 V / 3.3 V —
Tindminan RoHS Compliant Compliant
Process Technology 60 nm low-power CMOS TSMC 60 nm low-power
Hard Memory Controller DDR2 / DDR3 / LPDDR2 Yes (DDR/DDR2/DDR3/LPDDR2 via soft IP)
Embedded Memory Bits — 2,396,160 bits (approximately 2.5 Mb)
Embedded 18x18 Multipliers — 156
PLLs — 4
Global Clocks — 20
I/O Voltage Standards — LVDS, LVTTL, LVCMOS, SSTL, HSTL (1.2 V to 3.3 V)
Level ng MSL — [DATA_NEEDED: MSL level per JEDEC J-STD-020]
Lead-Free / Halogen-Free — Yes / [DATA_NEEDED: halogen-free status]
Configuration Modes — Active Serial (AS), Passive Serial (PS), JTAG
Transceivers — None (Cyclone 10 LP family does not include SERDES)

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