27C512L-15T vs 27C512MC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 27C512L-15T sa pamamagitan ng WaferScale Integration at 27C512MC-15 sa pamamagitan ng MX. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 27C512L-15T | 27C512MC-15 |
|---|---|---|
| Brand | WaferScale Integration | MX |
| Kategorya | Memory ICs | EEPROM |
| Katayuan ng Lifecycle | Obsolete | Tapus ng Buhay |
| Uri ng Memory | CMOS UV/OTP EPROM | EPROM (UV/OTP) |
| Density | 512 Kilobit (64K x 8) | — |
| Organisasyon | 64K x 8-bit | 64K x 8 |
| Access Time | 150 ns (-15 speed grade) | 150 ns |
| Volte ng Pagbibigay | +5 V +/-10% | — |
| Programming Voltage (VPP) | +12.5 V | 12.5 V |
| Programming Algorithm | 100% Flashrite programming | — |
| Standby Current (CMOS) | 20 uA typical | — |
| Interface | Parallel | Parallel |
| Pinout Standard | JEDEC-approved 27C512 pinout | — |
| Packhaging | 32-PLCC (T suffix) | [DATA_NEEDED: exact package of 27C512MC-15 suffix (28-pin DIP/PLCC/SOIC not confirmed in verified data)] |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Active Current | [DATA_NEEDED: active read current] | — |
| Type ng Output | Tri-state, 8-bit data bus (O0-O7) | — |
| Address Inputs | A0-A15 (16 address lines) | 16 (A0-A15) |
| Control Signals | CE, OE, VPP | — |
| Tindminan RoHS | unknown | unknown |
| Laki ng Memory | — | 512 Kbit |
| Supply Voltage (Read) | — | 5 V |
| Operating Mode | — | Completely static |
| Input/Output Compatibility | — | TTL compatible |
| Data Outputs | — | 8 (O0-O7), tri-state |
| Control Pins | — | CE (active-low), OE (active-low), PGM |
| Family Speed Grades | — | 45/55/70/90/100/120/150 ns |