27C512L-15T vs 27C512MC-15 比較
詳細並排比較 27C512L-15T 由 WaferScale Integration 與 27C512MC-15 由 MX. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 27C512L-15T | 27C512MC-15 |
|---|---|---|
| 品牌 | WaferScale Integration | MX |
| 類別 | Memory ICs | EEPROM |
| 生命週期狀態 | Obsolete | 停產終止 |
| 記憶體類型 | CMOS UV/OTP EPROM | EPROM (UV/OTP) |
| Density | 512 Kilobit (64K x 8) | — |
| 組織 | 64K x 8-bit | 64K x 8 |
| Access Time | 150 ns (-15 speed grade) | 150 ns |
| 供應電壓 | +5 V +/-10% | — |
| Programming Voltage (VPP) | +12.5 V | 12.5 V |
| Programming Algorithm | 100% Flashrite programming | — |
| Standby Current (CMOS) | 20 uA typical | — |
| 介面 | Parallel | Parallel |
| Pinout Standard | JEDEC-approved 27C512 pinout | — |
| 封裝 | 32-PLCC (T suffix) | [DATA_NEEDED: exact package of 27C512MC-15 suffix (28-pin DIP/PLCC/SOIC not confirmed in verified data)] |
| 安裝類型 | Surface Mount | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Active Current | [DATA_NEEDED: active read current] | — |
| 輸出類型 | Tri-state, 8-bit data bus (O0-O7) | — |
| Address Inputs | A0-A15 (16 address lines) | 16 (A0-A15) |
| Control Signals | CE, OE, VPP | — |
| RoHS 狀態 | unknown | unknown |
| 記憶體容量 | — | 512 Kbit |
| Supply Voltage (Read) | — | 5 V |
| Operating Mode | — | Completely static |
| Input/Output Compatibility | — | TTL compatible |
| Data Outputs | — | 8 (O0-O7), tri-state |
| Control Pins | — | CE (active-low), OE (active-low), PGM |
| Family Speed Grades | — | 45/55/70/90/100/120/150 ns |