2ED2183S06FXUMA1 vs 2EDN7534FXTMA1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 2ED2183S06FXUMA1 sa pamamagitan ng Infineon at 2EDN7534FXTMA1 sa pamamagitan ng Infineon. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Infineon
2ED2183S06FXUMA1 - 650V 2.5A Half-Bridge Gate Driver | Infineon
2ED2183S06FXUMA1 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 2ED2183S06FXUMA1 | 2EDN7534FXTMA1 |
|---|---|---|
| Brand | Infineon | Infineon |
| Kategorya | Power MOSFET Drivers | Power MOSFET Drivers |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Driver Type | Half-Bridge Gate Driver | Low-Side, Dual Channel |
| Number of Drivers | 1 | 2 |
| Bilang ng Outputs | 1 (half-bridge: high-side + low-side) | — |
| Configuration | High Side, Low Side, Non-Inverting | — |
| Maximum Offset Voltage | 650 V | — |
| Output Current (Sink/Source) | 2.5 A typical | — |
| Oras ng Pagtaas | 15 ns | — |
| Time ng Pagbaba | 15 ns | — |
| Supply Voltage (VCC) | 10 V to 20 V | — |
| Bootstrap Supply (VBS) | 10 V to 20 V (typ.) | — |
| Logic Input Voltage | 3.3 V / 5 V compatible (HIN, LIN) | — |
| Input Type | Non-Inverting | — |
| Bootstrap Diode | Integrated | — |
| Undervoltage Lockout (UVLO) | VCC and VBS | — |
| Temperature na Operasyon | -40 C to +125 C | -40C to +125C |
| Packhaging | PG-DSO-8-53 (DSO-8) | PG-DSO-8 |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 2 | — |
| Terminal Finish | Tin (e3 per JESD-609) | — |
| Technology | SOI (Silicon-On-Insulator) | — |
| Tindminan RoHS | Compliant | Compliant |
| Peak Output Current | — | 5 A (source/sink) |
| Supply Voltage (VDD) | — | 4.5 V to 20 V |
| Input Voltage Range (logic pins) | — | -12 V to +22 V (absolute max) |
| Propagation Delay (typical) | — | 19 ns |
| Input Logic Compatibility | — | LV-TTL |
| Output Polarity | — | Non-Inverting |
| Output Voltage Clamping | — | Active, to VDD |
| Rise Time (typ.) | — | [DATA_NEEDED: rise time] |
| Fall Time (typ.) | — | [DATA_NEEDED: fall time] |
| Channel-to-Channel Skew | — | [DATA_NEEDED: channel skew] |
| Under-Voltage Lockout | — | Yes |
| Pin na Pinapayagan | — | Yes |