5CSEBA4U23C7N vs 5CSEBA2U23C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSEBA4U23C7N sa pamamagitan ng Intel at 5CSEBA2U23C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSEBA4U23C7N - Cyclone V SE SoC FPGA, 40K LE, Dual ARM Cortex-A9 | Intel
5CSEBA4U23C7N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSEBA4U23C7N | 5CSEBA2U23C7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Device Variant | 5CSEA4 (Logic Element density) | — |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| Logic Elements | 40,000 | 25K |
| HPS Maximum Core Frequency | 800 MHz | — |
| DSP Blocks (18x18) | 224 | — |
| Embedded Memory | Approximately 2.7 Mbits (M10K + M9K) | M10K RAM blocks (total bits [DATA_NEEDED: M10K total bits]) |
| Packhaging | 672-ball UBGAs (UBGA), 23x23 mm | 672-UBGA (23x23 mm) |
| Core Voltage | 1.1 V | — |
| User I/O Count | 364 | — |
| High-Speed Transceivers | 6 (up to 3.125 Gbps) | Present (channel count [DATA_NEEDED: transceiver count]) |
| PCIe Hard IP | 2 Gen2 blocks | — |
| Temperature na Operasyon | Commercial 0C to +85C (C7 speed grade) | [DATA_NEEDED: Tj/Ta commercial range] |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | Compliant | Compliant |
| Process Technology | TSMC 28 nm low-power | TSMC 28 nm low-power |
| HPS Memory Interface | DDR3, DDR3L, LPDDR2 (16-bit + ECC option) | DDR3 / DDR3L / LPDDR2 controller |
| HPS Maximum Frequency | — | 800 MHz (application grade) |
| User I/O | — | 188 |
| DSP Blocks | — | Variable-precision (count [DATA_NEEDED: DSP block count]) |
| HPS Peripherals | — | Gigabit Ethernet MAC, USB 2.0 OTG, NAND, SD/eMMC |