5CSEBA5U19I7SN vs 5CSEBA4U19I7SN Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSEBA5U19I7SN sa pamamagitan ng Altera at 5CSEBA4U19I7SN sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSEBA4U19I7SN - Cyclone V SE SoC FPGA, 40K LE, ARM Cortex-A9 | Intel
5CSEBA4U19I7SN ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSEBA5U19I7SN | 5CSEBA4U19I7SN |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone V SE SoC FPGA | — |
| Device Variant | 5CSEA5 | — |
| Logic Elements | 85K | 40,000 |
| Hard Processor System | Single-core ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Clock | 800 MHz | — |
| FPGA Fabric Maximum Clock | [DATA_NEEDED: maximum fabric frequency] | — |
| Packhaging | 484-pin UBG (Ultra FineLine BGA, 19x19 mm) | 484-pin UBG A (19x19 mm) |
| Package Designator | U19 | — |
| Speed/Logic Grade | A5 (mid-tier speed grade) | — |
| User I/O Count | 66 (per distributor listing); up to 288 in Cyclone V SE family typical | — |
| Embedded Memory | [DATA_NEEDED: total Kbits] | [DATA_NEEDED: total Kbits of M9K blocks] |
| DSP Blocks | [DATA_NEEDED: DSP block count for 5CSEA5] | — |
| PLL Count | [DATA_NEEDED: PLL count for 5CSEA5] | — |
| Transceivers | [DATA_NEEDED: transceiver count for 5CSEA5 U19] | Not applicable (SE family, transceiver-less) |
| Temperature ng Junction na Operasyon | -40C to +100C (industrial) | — |
| Process Technology | TSMC 28 nm low-power | — |
| Configuration | SRAM-based, volatile | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | Compliant | Compliant |
| Level ng MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Series | — | Cyclone V SE SoC FPGA |
| Device Family | — | Cyclone V |
| Hard Processor System (HPS) | — | Single ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 800 MHz |
| Temperature na Operasyon | — | -40C to +100C (Industrial) |
| Process Node | — | 28 nm low-power |
| Supply Voltage (Core) | — | 1.1 V (typical) |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL (Cyclone V I/O family) |
| 18x18 Hardware Multipliers | — | [DATA_NEEDED: count] |
| PLLs | — | [DATA_NEEDED: count] |
| PCI Express Hard IP | — | Gen1 capable (rootport/endpoint) |
| DDR Memory Support | — | DDR2/DDR3/LPDDR2 via HPS and FPGA fabric |