5CSXFC6D6F31A7N vs 5CSXFC5D6F31I7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSXFC6D6F31A7N sa pamamagitan ng Intel at 5CSXFC5D6F31I7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSXFC6D6F31A7N - Cyclone V SX SoC FPGA, 110K LE, 896-FBGA | Intel
5CSXFC6D6F31A7N ✓ NakahandaIntel
5CSXFC5D6F31I7N - Cyclone V SX SoC FPGA, 85K LE, Dual ARM Cortex-A9
5CSXFC5D6F31I7N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSXFC6D6F31A7N | 5CSXFC5D6F31I7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone V SX SoC FPGA | Cyclone V SX SoC FPGA |
| Logic Elements | 110,000 | 85,000 |
| Process Technology | 28 nm TSMC low-power | 28 nm low-power |
| Hard Processor System (HPS) | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum HPS Clock Frequency | 700 MHz | — |
| Core Voltage | 1.1 V | 1.1 V |
| User I/O Count | 288 | — |
| Packhaging | 896-ball FBGA (31 x 31 mm) | 896-ball FBGA (31 x 31 mm) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Operating Temperature Grade | Automotive / AEC-Q100 | — |
| Automotive Qualification | AEC-Q100 | — |
| Embedded Memory | Approximately 5.5 Mbits (M10K + MLAB) | — |
| DSP Blocks | Up to 224 (18 x 18 multipliers) | 18 x 18 multipliers |
| Hard Memory Controller | DDR2 / DDR3 / LPDDR2 / QDR II+ | — |
| Hard IP Peripherals | PCIe Gen2, GbE, USB 2.0 OTG, NAND, SD/MMC | — |
| Configuration | FPGA + HPS subsystem, integrated | — |
| Tindminan RoHS | Compliant | Compliant |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | [DATA_NEEDED: MSL level] | — |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 800 MHz |
| Package Pitch | — | 1.0 mm |
| Temperature na Operasyon | — | -40 C to +100 C (Industrial, TJ) |
| Memory Interfaces | — | DDR2, DDR3, LPDDR2 |
| I/O Standards | — | LVDS, LVTTL, LVCMOS, RSDS |
| Transceivers | — | Present (Cyclone V SX transceiver variants) |
| Level ng MSL | — | 3 (per JEDEC J-STD-020, typical for BGA) |