5M1270ZF256I5N vs 5M1270ZF256C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M1270ZF256I5N sa pamamagitan ng Altera at 5M1270ZF256C4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M1270ZF256I5N | 5M1270ZF256C4N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX V | MAX V |
| Macro Cells | 980 | — |
| Maximum Operating Frequency | 201.1 MHz | 304 MHz |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| User I/O Pins (max) | 212 | — |
| Packhaging | 256-ball FBGA | 256-FBGA (17 x 17 mm, 1.0 mm pitch) |
| Configuration Memory | Non-volatile flash (instant-on) | — |
| Programming Interface | JTAG, Active Serial, Active Parallel | — |
| Process Technology | 0.18 um CMOS | — |
| Typical Quiescent Power | [DATA_NEEDED: typical quiescent power in mW] | — |
| Temperature na Operasyon | -40C to +100C (Industrial) | 0C to +70C (commercial, TJ) |
| Pin-to-Pin Delay (tPD) | [DATA_NEEDED: tPD in ns] | — |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Series | — | 5M1270Z |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Number of Macrocells | — | 980 |
| Number of Logic Array Blocks (LABs) | — | 127 |
| Number of User I/Os | — | 211 |
| Propagation Delay (tPD) | — | 6.2 ns (max) |
| Supply Voltage - Internal | — | 1.71 V to 1.89 V (nominal 1.8 V) |
| Programmability | — | In-System Programmable (ISP) via JTAG |
| Uri ng Pagpapasok | — | Surface Mount |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |