5M40ZE64C4N vs 5M40ZE64C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M40ZE64C4N sa pamamagitan ng Intel at 5M40ZE64C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M40ZE64C4N | 5M40ZE64C5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | — |
| Logic Elements (LE) | 32 | 40 |
| User Flash Memory | 4 Kbit | — |
| Pin-to-Pin Delay (tPD1) | 7.5 ns | — |
| Maximum Internal Frequency | 184 MHz | 118.3 MHz |
| Number of I/O Pins | 30 (approx.) | — |
| Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage | 1.8 V / 2.5 V / 3.3 V | — |
| Process Technology | 0.18 µm flash-based CMOS | — |
| Configuration Memory | Non-volatile flash (internal) | Flash (non-volatile) |
| Programmable Pull-up Resistors | Yes (per-pin, internal) | — |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) - in-system programmable |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0C to +85C (commercial) |
| Packhaging | EQFP-64 (Plastic Enhanced QFP, 64 pins) | 64-pin EQFP (Plastic Enhanced Thin QFP) with exposed thermal pad |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Series | — | MAX V |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Macrocells | — | 32 |
| Maximum User I/Os | — | 54 |
| Propagation Delay (tPD1) | — | 7.5 ns |
| Supply Voltage - Core | — | 1.8 V (internal) |
| External Supply Voltage | — | 3.3 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVCMOS, LVTTL |
| User Flash Memory (UFM) | — | Yes (on-chip non-volatile) |