5M80ZE64I5N vs 5M160ZE64I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M80ZE64I5N sa pamamagitan ng Altera at 5M160ZE64I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M80ZE64I5N | 5M160ZE64I5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | — |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macro Cells (Logic Elements) | 64 | — |
| User I/Os | 30 | — |
| Internal Frequency (fMAX) | 118.3 MHz | — |
| Propagation Delay (tPD) | 7.9 ns | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.2 V to 3.3 V | — |
| Logic Block Number | 4 | — |
| Packhaging | EQFP-64 (HTFQFP-64, 9x9 mm, 0.4 mm pitch) | 64-pin EQFP (Exposed Pad) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP via Quartus II | — |
| Non-volatile Configuration | Yes (Flash-based) | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | Compliant | Compliant |
| Device Family | — | MAX V |
| Logic Elements (LEs) | — | 160 |
| Macrocells | — | 128 |
| Maximum User I/O Pins | — | 79 |
| Pin-to-Pin Logic Delay (tPD) | — | 7.5 ns |
| User Flash Memory | — | 4.0 Kbits |
| Logic Array Blocks (LABs) | — | 4 |
| Supply Voltage - Core | — | 3.3 V or 2.5 V |
| I/O Bank Voltages | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| JTAG Support | — | Yes (IEEE 1149.1, TMS/TDI/TDO/TCK) |
| Differential I/O | — | LVDS, RSDS, mini-LVDS, LVPECL (emulated) |
| Configuration | — | Non-volatile on-chip flash, instant-on |