A3PE3000-1FGG896I vs A3PE3000L-FGG896M Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A3PE3000-1FGG896I sa pamamagitan ng Microchip Technology at A3PE3000L-FGG896M sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A3PE3000-1FGG896I - ProASIC3E Flash FPGA 3M Gates | Microchip
A3PE3000-1FGG896I ✓ NakahandaMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A3PE3000-1FGG896I | A3PE3000L-FGG896M |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | ProASIC3E Flash FPGA | ProASIC3L (Flash-based FPGA) |
| System Gates | 3,000,000 | 3,000,000 |
| Logic Cells | 75,264 | 75,264 |
| Total RAM Bits | 516,096 | — |
| User I/O | 620 | — |
| Maximum Operating Frequency | 272 MHz | — |
| Core Supply Voltage | 1.425 V to 1.575 V (1.5 V nominal) | — |
| Speed Grade | -1 | — |
| Process Technology | 130 nm CMOS flash | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Configuration Memory | On-chip flash (nonvolatile, single chip) | — |
| Packhaging | 896-Ball FBGA (FGG896), square, ball grid array | 896-ball FBGA (FGG896), 1 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature Grade | Industrial (I suffix) | — |
| Terminal Form | Ball | — |
| Terminal Count | 896 | — |
| Tindminan RoHS | Compliant | — |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Core Voltage | — | 1.2 V to 1.5 V |
| Volte ng Pagbibigay | — | 1.5 V |
| Logic Family | — | CMOS |
| Temperature na Operasyon | — | 0 to 70 C |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |