A3PE3000-FG324I vs A3PE3000L-FG324I Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A3PE3000-FG324I sa pamamagitan ng Microchip Technology at A3PE3000L-FG324I sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A3PE3000-FG324I - ProASIC3E FPGA 3M Gates 324-BGA | Microchip
A3PE3000-FG324I ✓ NakahandaMicrochip Technology
A3PE3000L-FG324I - 3M-Gate Flash FPGA, 221 I/O | Microchip
A3PE3000L-FG324I ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A3PE3000-FG324I | A3PE3000L-FG324I |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | ProASIC3E | ProASIC3L (Flash-based FPGA) |
| Logic Elements | 35K (per distributor listing) | — |
| System Gates | 3M (3,000,000 gates) | 3,000,000 |
| Maximum System Frequency | 231 MHz | — |
| Process Technology | 130 nm flash | 130 nm CMOS, 7-layer metal (6 copper), flash-based |
| Core Supply Voltage | 1.5 V | — |
| Number of I/Os | 221 | — |
| Configuration Memory | 516096 (internal flash, nonvolatile) | — |
| Packhaging | 324-BGA (FBGA) | 324-ball FBGA (FG324), 19x19 mm |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40C to +125C (industrial) | -40C to +100C (Industrial, I suffix) |
| Programming Type | In-System Programmable (flash, nonvolatile) | — |
| Embedded Memory | [DATA_NEEDED: embedded block RAM size] | — |
| Number of PLLs | [DATA_NEEDED: PLL count] | — |
| Supported I/O Standards | [DATA_NEEDED: I/O standard list] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Non-Compliant (FG package contains lead) |
| Level ng MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Logic Cells (CLBs) | — | 75264 |
| User I/O | — | 221 |
| Embedded SRAM | — | 516096 bits (up to 144 kbits true dual-port blocks per family) |
| Core Voltage | — | 1.2 V (1.2 V to 1.5 V supported) |
| Configuration | — | Nonvolatile flash, Instant On (Level 0 support) |
| Low Power Feature | — | Flash*Freeze technology |
| Max Frequency | — | [DATA_NEEDED: maximum system frequency] |
| JTAG Boundary Scan | — | IEEE 1149.1 |
| Input Option | — | Schmitt Trigger on single-ended inputs |
| Lead Free Status | — | Contains Lead |