A42MX36-2BGG272 vs A42MX36-3BGG272 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A42MX36-2BGG272 sa pamamagitan ng Microchip Technology at A42MX36-3BGG272 sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A42MX36-2BGG272 - 54K Gate 5V FPGA, 202 I/O | Microchip
A42MX36-2BGG272 ✓ NakahandaMicrochip Technology
A42MX36-3BGG272 - 54K Gate 5V FPGA, 272-ball BGA | Microchip
A42MX36-3BGG272 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A42MX36-2BGG272 | A42MX36-3BGG272 |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | 42MX (MX FPGA) | MX (42MX) |
| Equivalent Gates | 54,000 | — |
| Configurable Logic Blocks (CLBs) | 1184 | — |
| Logic Cells | 2438 | — |
| User I/O | 202 | — |
| Speed Grade | -2 | -3 |
| Maksimum na Taktiko ng Oras | 91 MHz | — |
| Volte ng Pagbibigay | 5.0 V | 5 V |
| Programmability | One-Time Programmable (antifuse) | — |
| Embedded Memory | Dual-port SRAM blocks (FIFO/LIFO) | — |
| Packhaging | 272-BBGA | 272-ball BGA (BGG272) |
| Ball Pitch | 1.27 mm | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| JESD-30 Package Code | S-PBGA-B272 | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range for this speed grade suffix] |
| Design Software | Microsemi Designer / ACTgen | — |
| Programmable Type | — | In-System Programmable FPGA |
| Logic Blocks (CLBs) | — | 1184 |
| Equivalent Gate Count | — | 54000 |
| Programmable I/O | — | 202 |
| Combinatorial Delay | — | 1.9 ns |
| Programming Technology | — | Antifuse (one-time programmable) |
| Ceramic/Military Package Option | — | CQ208 / CQ256 screened to MIL-STD-883 (family option) |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Primary Use | — | 5V ASIC alternative / legacy PLD integration |