AD9500WAFER vs AD9500BP Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng AD9500WAFER sa pamamagitan ng Analog Devices at AD9500BP sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Analog Devices
AD9500WAFER - Programmable Delay Generator Die | Analog Devices
AD9500WAFER ✓ NakahandaPagsanggunian na paghahambing
| Parametro | AD9500WAFER | AD9500BP |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | Clock & Timing | Clock & Timing |
| Katayuan ng Lifecycle | Aktibo | Unknown |
| Manufacturer | Analog Devices | — |
| Part Number | AD9500WAFER | — |
| Part Type | Digitally Programmable Delay Generator | — |
| Package / Form Factor | IC Die (bare silicon wafer form) | — |
| Programming Resolution | 8 bits digital delay programming | — |
| Analog Fine Adjust | Yes (external analog sweep / vernier input) | — |
| Trigger Input Level | CMOS / TTL compatible | — |
| Output Level | CMOS / TTL compatible | — |
| Volte ng Pagbibigay | +5 V single supply | [DATA_NEEDED: supply voltage] |
| Supply Voltage Tolerance | [DATA_NEEDED: supply voltage tolerance] | — |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Maximum Delay Range | [DATA_NEEDED: maximum delay range in nanoseconds/microseconds] | — |
| Minimum Delay Step | [DATA_NEEDED: minimum delay step in picoseconds] | — |
| Trigger-to-Output Jitter | [DATA_NEEDED: trigger-to-output jitter] | — |
| ESD Rating (Human Body Model) | [DATA_NEEDED: HBM ESD rating - die handling only] | — |
| Package Reference (Packaged Sibling) | 24-pin ceramic Skinny DIP, 28-pin surface mount (per packaged AD9500 datasheet) | — |
| Packaged Sibling | AD9500 (ceramic DIP and SOIC packaged parts available) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status of bare die] | [DATA_NEEDED: RoHS status] |
| Uri ng Pagpapasok | Die attach / wire bond / flip-chip (integrator-dependent) | — |
| Military / 883B Sibling | AD9500/883B available per MIL-STD-883 | — |
| Product Type | — | Digitally programmable delay generator |
| Delay Resolution | — | 10 ps |
| Full-Scale Delay Range | — | 10 ns |
| Programming Interface | — | 8-bit digital code |
| Input Type | — | Fully differential inputs |
| Input Logic Support | — | Single-ended or differential ECL circuits |
| Type ng Output | — | Complementary ECL output |
| Output Feature | — | Q/R parallel output circuit |
| Trigger Inputs | — | Separate trigger input |
| Reset Inputs | — | Separate reset input |
| Power Consumption | — | Low power, mW class |
| Military Availability | — | Versions compliant with MIL-STD-883 available |
| Packhaging | — | 28-LCC J-lead surface-mount package |
| Package Family | — | Lead-chip carrier ceramic surface-mount package |
| Ceramic DIP Variant | — | 24-pin ceramic skinny DIP, 0.3 inch package width |
| Temperature na Operasyon | — | [DATA_NEEDED: operating temperature range] |
| Propagation Delay | — | [DATA_NEEDED: propagation delay] |
| Jitter | — | [DATA_NEEDED: jitter] |