ADS6423IRGC25 vs ADS62P48IRGC25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng ADS6423IRGC25 sa pamamagitan ng Texas Instruments at ADS62P48IRGC25 sa pamamagitan ng Texas Instruments. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Texas Instruments
ADS6423IRGC25 - Quad 12-Bit 80MSPS ADC w/ Serial LVDS | TI
ADS6423IRGC25 ✓ NakahandaTexas Instruments
ADS62P48IRGC25 - Dual 14-Bit 210MSPS ADC | Texas Instruments
ADS62P48IRGC25 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | ADS6423IRGC25 | ADS62P48IRGC25 |
|---|---|---|
| Brand | Texas Instruments | Texas Instruments |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 12 bits | 14 bit |
| Number of Channels | 4 (simultaneous sampling) | 2 (Dual) |
| Sample Rate | 80 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Input Type | Differential, -2 V to +2 V | Differential analog inputs |
| Data Interface | Serial LVDS (1-wire or 2-wire) | — |
| Analog Supply Voltage | 3.3 V | 1.8 V |
| Digital Supply Voltage | 1.8 V (LVDS) | 3.3 V |
| Packhaging | 64-pin VQFN (RGC), 9 mm × 9 mm | — |
| Temperature na Operasyon | -40 C to +85 C (industrial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| SNR (typ., 30 MHz input) | [DATA_NEEDED: SNR figure] dBFS | — |
| SFDR (typ., 30 MHz input) | [DATA_NEEDED: SFDR figure] dBc | — |
| Power Dissipation (typ.) | [DATA_NEEDED: power dissipation] mW | — |
| Tindminan RoHS | Compliant | Compliant |
| Sample Rate (max) | — | 210 MSPS |
| Output Interface | — | DDR LVDS / Parallel CMOS (selectable) |
| Hanay ng Temperature na Operasyon | — | -40 C to +85 C (Industrial) |
| Packhaging / Kaso | — | 64-VQFN (RGC) 9x9 mm (HVQCCN) |
| Bilang ng Pin | — | 64 |
| Level ng MSL | — | 3 |
| Lead Free | — | Yes |
| Input Clock Type | — | LVDS differential clock |
| Internal Dither | — | Yes (programmable) |
| Programmable Gain | — | Yes (improves SFDR at lower FS inputs) |