AFS600-FGG484 vs AFS600-FGG484I Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng AFS600-FGG484 sa pamamagitan ng Microchip Technology at AFS600-FGG484I sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
AFS600-FGG484 - 600K-Gate Mixed-Signal FPGA | Microchip
AFS600-FGG484 ✓ NakahandaMicrochip Technology
AFS600-FGG484I - 600K Gate Mixed-Signal FPGA | Microchip
AFS600-FGG484I UnknownPagsanggunian na paghahambing
| Parametro | AFS600-FGG484 | AFS600-FGG484I |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Unknown |
| Device Type | Fusion mixed-signal FPGA | Fusion mixed-signal FPGA |
| System Gates | 600000 gates | 600,000 gates |
| Maximum Frequency | 1098.9 MHz | — |
| Technology | 130 nm | — |
| Metal Layers | 7 layers | — |
| Process | Flash-based CMOS | — |
| Volte ng Pagbibigay | 1.5 V | — |
| I/O Count | 172 I/O | — |
| Temperature na Operasyon | 0 C to 70 C | [DATA_NEEDED: operating temperature range] |
| Packhaging | 484-pin FBGA; one verified source alternatively labels BGA-256 | — |
| Configuration Retention | Nonvolatile flash | — |
| Power-Up Feature | Live at Power-Up (LAPU) | — |
| Architecture | Monolithic mixed-signal FPGA | — |
| Programmable Logic | High-performance flash-based programmable logic | High-performance flash-based programmable logic |
| Analog Resources | Configurable analog resources | Integrated configurable analog blocks |
| Flash Memory | Large flash-memory blocks | — |
| Clocking | Comprehensive clock generation and management circuitry | — |
| Processor Support | Optional ARM support | — |
| Uri ng Pagpapasok | Surface mount | Surface mount |
| Katayuan ng Lifecycle | [DATA_NEEDED: current lifecycle status] | — |
| RoHS Compliance | [DATA_NEEDED: RoHS compliance status] | — |
| REACH Compliance | [DATA_NEEDED: REACH compliance status] | — |
| Number of I/O | — | 172 I/O |
| Total Package Pins | — | 484 pins |
| Package Type | — | 484-pin FBGA |
| Logic Family | — | CMOS |
| Core Supply Voltage | — | 1.5 V |
| Process Technology | — | 130 nm |
| Configuration Memory | — | Flash-based nonvolatile memory |
| Embedded Memory | — | Large flash memory blocks |
| Clock Management | — | Integrated clock generation and management circuitry |
| Tindminan RoHS | — | RoHS compliant |
| Lead-Free Status | — | Lead free |
| Programming Interface | — | [DATA_NEEDED: programming interface and supported tool versions] |