ATF16V8B-15PC vs ATF16V8B-15JC Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng ATF16V8B-15PC sa pamamagitan ng Microchip Technology at ATF16V8B-15JC sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
ATF16V8B-15PC - 15 ns 250-Gate EEPLD | Microchip Technology
ATF16V8B-15PC ✓ NakahandaMicrochip Technology
ATF16V8B-15JC - 15ns 8-Macrocell EEPLD | Microchip Technology
ATF16V8B-15JC ✓ NakahandaPagsanggunian na paghahambing
| Parametro | ATF16V8B-15PC | ATF16V8B-15JC |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | Logic ICs | Logic ICs |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Type | Electrically erasable programmable logic device (EEPLD) | Electrically erasable programmable logic device (EEPLD) |
| Programmable Gate Capacity | 250 gates | — |
| Maximum Inputs | Up to 16 inputs | — |
| I/O Count | 8 I/Os | Up to 8 I/Os |
| Macrocell Count | 8 macrocells | 8 macrocells |
| Speed Grade | 15 ns | — |
| Family Maximum Pin-to-Pin Delay | 7.5 ns | — |
| Volte ng Pagbibigay | 5 V | 5 V |
| Configuration Technology | Electrically erasable Flash memory | — |
| Logic Architecture | 16V8 architecture with 8 outputs | — |
| Output Product-Term Allocation | 8 product terms per output | — |
| Operating Mode Support | Three software-selected modes of operation | — |
| Power Class | Standard power | — |
| Packhaging | 20-pin PDIP | 20-pin PLCC (9x9 mm) |
| Package Pitch | 7.62 mm (0.300 inch) | — |
| Package Finish | Green package | — |
| Uri ng Pagpapasok | Through-hole | Surface mount |
| Family Standby Current | 5 mA | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS compliance status] |
| REACH Status | unknown | [DATA_NEEDED: REACH compliance status] |
| AEC-Q100 Qualification | not_applicable | — |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Architecture | — | 16V8 SPLD architecture with 8 macrocells |
| Propagation Delay | — | 15 ns |
| Logic Capacity | — | 250 gates |
| Maximum Input Count | — | Up to 16 inputs |
| Configuration Memory | — | Electrically erasable Flash memory |
| Product Terms per Output | — | 8 product terms per output |
| Architecture Compatibility | — | Emulates many 20-pin PALs |
| Kuru-kuryente ng Pagbibigay | — | [DATA_NEEDED: operating and standby supply current] |