ATSAMA5D225C-D1M-CU vs ATSAMA5D22B-CU Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng ATSAMA5D225C-D1M-CU sa pamamagitan ng Microchip Technology at ATSAMA5D22B-CU sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
ATSAMA5D225C-D1M-CU - 500MHz Cortex-A5 MPU w/ 128Mb DDR2 SiP | Microchip
ATSAMA5D225C-D1M-CU ✓ NakahandaMicrochip Technology
ATSAMA5D22B-CU - 500MHz ARM Cortex-A5 MPU, 196-TFBGA | Microchip
ATSAMA5D22B-CU ✓ NakahandaPagsanggunian na paghahambing
| Parametro | ATSAMA5D225C-D1M-CU | ATSAMA5D22B-CU |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | Microcontrollers | Microcontrollers |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Core Processor | ARM Cortex-A5 | ARM Cortex-A5 (32-bit, single core) |
| Number of Cores | 1 Core, 32-Bit | — |
| Maximum CPU Clock | 500 MHz | 500 MHz |
| Integrated DRAM | 128 Mbit DDR2 SDRAM (SiP) | — |
| ROM / Boot Code | 160 KB ROM | — |
| Graphics Acceleration | Yes (LCD controller up to WXGA 1366x768) | — |
| RAM Controllers | LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI | — |
| Ethernet | 10/100/1000 GMAC | — |
| USB | 1x HSIC, 1x USB 2.0 HS Host/Device | — |
| CAN | CAN-FD | — |
| Security | Arm TrustZone, secure boot, tamper detection, AES/SHA/TRNG | — |
| Touch Controller | Peripheral Touch Controller (PTC) integrated | — |
| Audio | Embedded audio subsystem (I2S, Class-D amplifier) | — |
| Packhaging | 196-ball TFBGA 11x11 mm, 0.8 mm pitch | 196-TFBGA (CSBGA), 11x11 mm, 0.8 mm pitch |
| Temperature na Operasyon | -40C to +85C (Industrial, IND TEMP) | -40 C to +85 C (industrial) |
| Volte ng Pagbibigay | 1.2 V core (per typical SiP) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | Compliant (Green, lead-free) | Compliant |
| Core Architecture | — | ARMv7-A with TrustZone and NEON |
| L1 Instruction Cache | — | 32 Kbytes |
| L1 Data Cache | — | 32 Kbytes |
| L2 Cache / SRAM | — | 128 Kbytes (configurable as internal SRAM) |
| Memory Architecture | — | MMU (full virtual memory support) |
| External Memory Support | — | LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L (16-bit) |
| Flash Interfaces | — | 2x QSPI, e.MMC |
| Supply Voltage (core) | — | 1.2 V (typ, internal regulator) |
| Supply Voltage (I/O) | — | 3.3 V (typ) |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Lead-Free / Halogen-Free | — | Lead-free finish; halogen status [DATA_NEEDED] |