CDK8307BILP64 vs CDK8307AILP64 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng CDK8307BILP64 sa pamamagitan ng MaxLinear at CDK8307AILP64 sa pamamagitan ng MaxLinear. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

MaxLinear
CDK8307BILP64 CDK8307BILP64 - Octal 12/13-bit 40MSPS LVDS ADC | MaxLinear

CDK8307BILP64 - Octal 12/13-bit 40MSPS LVDS ADC | MaxLinear

CDK8307BILP64 ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro CDK8307BILP64 CDK8307AILP64
Brand MaxLinear MaxLinear
Kategorya ADC/DAC ADC/DAC
Katayuan ng Lifecycle Aktibo Aktibo
Product Type Octal Analog-to-Digital Converter (ADC) —
Pangangasiwaan 12-bit or 13-bit (programmable) 12/13-bit (selectable)
Sample Rate (per channel) 20 / 40 / 50 / 65 MSPS —
Number of Channels 8 8 (simultaneous sampling)
Total Power Dissipation 280 mW —
Data Output Interface Serial LVDS —
Input Type Differential analog inputs (one per channel) —
Reference Internal (integrated bandgap reference) Internal reference (integrated)
Clock Architecture External reference clock with integrated PLL (x12 or x14 multiplication) —
Control Interface Serial control interface Serial programming interface (SPI-style)
Packhaging 64-pin QFN (LP suffix) 64-pin QFN (ILP64)
Uri ng Pagpapasok Surface Mount Surface Mount
Hanay ng Temperature na Operasyon [DATA_NEEDED: operating temperature range] [DATA_NEEDED: temperature range]
Volte ng Pagbibigay [DATA_NEEDED: supply voltage rating] [DATA_NEEDED: supply voltage]
Tindminan RoHS Compliant Compliant
Sample Rate Range — 20 / 40 / 50 / 65 / 80 MSPS
Architecture — Pipelined ADC with proprietary core
Output Interface — Serial LVDS
Power Dissipation (Typ) — Ultra-low power (per-channel shutdown)
Shutdown Modes — Per-channel + full-chip idle (via external pin)
FPGA Compatibility — Designed to interface with major FPGA vendors
Original Brand — Cadeka / Exar (now MaxLinear)

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