CDK8307DILP64 vs CDK8307AILP64 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng CDK8307DILP64 sa pamamagitan ng MaxLinear at CDK8307AILP64 sa pamamagitan ng MaxLinear. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro CDK8307DILP64 CDK8307AILP64
Brand MaxLinear MaxLinear
Kategorya ADC/DAC ADC/DAC
Katayuan ng Lifecycle Aktibo Aktibo
Pangangasiwaan 12/13-bit 12/13-bit (selectable)
Sample Rate (max) 65 MSPS —
Sample Rate Options 20 / 40 / 50 / 65 MSPS —
Number of Channels 8 8 (simultaneous sampling)
Architecture Proprietary pipelined Pipelined ADC with proprietary core
Input Type Single-ended analog input —
Output Interface Serial LVDS Serial LVDS
Reference Internal Internal reference (integrated)
Control Interface Serial (SPI-compatible) Serial programming interface (SPI-style)
Analog Supply Voltage 1.8 V —
Digital Supply Voltage (OVDD) 1.7 V to 3.6 V —
Power Consumption [DATA_NEEDED: mW per channel at 65 MSPS, total ~45 mW quoted by Mouser snippet but per-channel figure not in supplied data] —
Packhaging 64-pin QFN (9x9 mm) 64-pin QFN (ILP64)
Hanay ng Temperature na Operasyon [DATA_NEEDED: industrial/commercial temperature grade] [DATA_NEEDED: temperature range]
Uri ng Pagpapasok Surface Mount Surface Mount
Level ng MSL [DATA_NEEDED] —
Tindminan RoHS Compliant Compliant
Sample Rate Range — 20 / 40 / 50 / 65 / 80 MSPS
Volte ng Pagbibigay — [DATA_NEEDED: supply voltage]
Power Dissipation (Typ) — Ultra-low power (per-channel shutdown)
Shutdown Modes — Per-channel + full-chip idle (via external pin)
FPGA Compatibility — Designed to interface with major FPGA vendors
Original Brand — Cadeka / Exar (now MaxLinear)

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