CDK8307DILP64 vs CDK8307AILP64 对比

详细并排对比 CDK8307DILP64 出自 MaxLinear 和 CDK8307AILP64 出自 MaxLinear。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 CDK8307DILP64 CDK8307AILP64
品牌 MaxLinear MaxLinear
分类 ADC/DAC ADC/DAC
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $13.95 $18.45
分辨率 12/13-bit 12/13-bit (selectable)
Sample Rate (max) 65 MSPS —
Sample Rate Options 20 / 40 / 50 / 65 MSPS —
Number of Channels 8 8 (simultaneous sampling)
Architecture Proprietary pipelined Pipelined ADC with proprietary core
Input Type Single-ended analog input —
Output Interface Serial LVDS Serial LVDS
Reference Internal Internal reference (integrated)
Control Interface Serial (SPI-compatible) Serial programming interface (SPI-style)
Analog Supply Voltage 1.8 V —
Digital Supply Voltage (OVDD) 1.7 V to 3.6 V —
Power Consumption [DATA_NEEDED: mW per channel at 65 MSPS, total ~45 mW quoted by Mouser snippet but per-channel figure not in supplied data] —
封装 64-pin QFN (9x9 mm) 64-pin QFN (ILP64)
工作温度范围 [DATA_NEEDED: industrial/commercial temperature grade] [DATA_NEEDED: temperature range]
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED] —
RoHS 状态 Compliant Compliant
Sample Rate Range — 20 / 40 / 50 / 65 / 80 MSPS
电源电压 — [DATA_NEEDED: supply voltage]
Power Dissipation (Typ) — Ultra-low power (per-channel shutdown)
Shutdown Modes — Per-channel + full-chip idle (via external pin)
FPGA Compatibility — Designed to interface with major FPGA vendors
Original Brand — Cadeka / Exar (now MaxLinear)

数据手册与资源

浏览全部产品 创建 BOM 获取报价