EP1810GC-35 vs EP1810GM883B Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1810GC-35 sa pamamagitan ng Altera at EP1810GM883B sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP1810GC-35 EP1810GM883B
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili NRND
Device Type EPLD (Erasable Programmable Logic Device) —
Logic Family Altera Classic EPLD TTL-compatible I/O
Technology CMOS, UV-erasable EPROM cells CMOS, UV-erasable
Packhaging CPGA-68 (Ceramic Pin Grid Array, 68-pin) —
Bilang ng Pins 68 —
Propagation Delay (tpd max) 40 ns —
Maximum Inputs 64 —
Maximum Outputs 48 —
Macrocells 16 48
I/O Standard TTL-compatible —
Programming Method UV erasure + EPROM programming UV-erasable / Altera programming hardware
Temperature na Operasyon [DATA_NEEDED: operating temperature range] -55 °C to +125 °C (Military, MIL-STD-883B)
Volte ng Pagbibigay [DATA_NEEDED: VCC range] —
Uri ng Pagpapasok Through Hole Through-hole (PGA socket or PCB through-hole)
Tindminan RoHS Not applicable (legacy ceramic package) —
Lead-Free Status Not applicable —
Manufacturer (current source) Rochester Electronics (authorized Altera EPLD partner) —
Original Manufacturer Altera Corporation (now Intel FPGA) —
Device Family — EP1810 (Classic EPLD)
User Flip-Flops — Up to 64
Total Inputs — 60
Dedicated Inputs — 12
I/O Pins — 48 (bidirectional, tri-state)
Propagation Delay (tPD) — 50 ns max
Supply Voltage (VCC) — 4.5 V to 5.5 V
Package Type — Ceramic Pin Grid Array (PGA), 84 pins
Package Designator — GM (ceramic PGA)
Processing Level — MIL-STD-883B (Class B)
Lead-Free / RoHS — [DATA_NEEDED: lead-free status]

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