EP1810GC-35AB vs EP1810GM883B Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1810GC-35AB sa pamamagitan ng Altera at EP1810GM883B sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1810GC-35AB | EP1810GM883B |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Product Family | Classic EPLD | — |
| Technology | CMOS EPROM | CMOS, UV-erasable |
| Number of Macrocells | 48 | — |
| Number of Usable Gates | 1200 | — |
| Maximum Inputs | 64 | — |
| Maximum Outputs | 48 | — |
| Number of I/O Pins | 48 | — |
| Dedicated Input Pins | 12 | — |
| Propagation Delay (tPD) | 35 ns | 50 ns max |
| Maximum Toggle Frequency | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V | 4.5 V to 5.5 V |
| Package Type | Pin Grid Array (PGA), ceramic | Ceramic Pin Grid Array (PGA), 84 pins |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -55 °C to +125 °C (Military, MIL-STD-883B) |
| Programming Method | UV-erasable EPROM, in-system via JTAG-like interface | UV-erasable / Altera programming hardware |
| Tindminan RoHS | unknown | — |
| Device Family | — | EP1810 (Classic EPLD) |
| Macrocells | — | 48 |
| User Flip-Flops | — | Up to 64 |
| Total Inputs | — | 60 |
| Dedicated Inputs | — | 12 |
| I/O Pins | — | 48 (bidirectional, tri-state) |
| Package Designator | — | GM (ceramic PGA) |
| Processing Level | — | MIL-STD-883B (Class B) |
| Uri ng Pagpapasok | — | Through-hole (PGA socket or PCB through-hole) |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| Logic Family | — | TTL-compatible I/O |