EP1810LC-20 vs EP1810LC-25T Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1810LC-20 sa pamamagitan ng Intel at EP1810LC-25T sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1810LC-20 | EP1810LC-25T |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Classic EPLD | Altera Classic EP1810 |
| Device Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable/OTP Complex PLD) |
| Usable Gates | 900 | Approx. 900 |
| Macrocells | 48 | 48 (4 quadrants x 12 macrocells) |
| Maximum Operating Frequency | 50 MHz | — |
| Propagation Delay (tPD) | 20 ns | 25 ns |
| Volte ng Pagbibigay | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS EPROM | CMOS, UV-erasable / OTP |
| Programmability | UV-Erasable / OTP | — |
| Dedicated Inputs | 12 | 16 |
| Packhaging | 68-pin PLCC | 28-pin J-lead PLCC (Plastic Leaded Chip Carrier) |
| Package Suffix | LC (PLCC, windowed for UV erase on L variant) | — |
| Speed Grade | 20 ns (commercial) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0 °C to +70 °C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status - confirm with manufacturer] |
| Bidirectional I/O Pins | — | 48 |
| External Clocks | — | 4 |
| Supply Voltage (VCC) | — | 5 V nominal |
| I/O Standard | — | TTL-compatible 5 V |
| Programming Tool | — | Altera MAX+PLUS II / Quartus Classic |