EP1810LC-20 vs EP1810LC-25T 比較
詳細並排比較 EP1810LC-20 由 Intel 與 EP1810LC-25T 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1810LC-20 | EP1810LC-25T |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | Classic EPLD | Altera Classic EP1810 |
| Device Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable/OTP Complex PLD) |
| Usable Gates | 900 | Approx. 900 |
| Macrocells | 48 | 48 (4 quadrants x 12 macrocells) |
| Maximum Operating Frequency | 50 MHz | — |
| Propagation Delay (tPD) | 20 ns | 25 ns |
| 供應電壓 | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS EPROM | CMOS, UV-erasable / OTP |
| Programmability | UV-Erasable / OTP | — |
| Dedicated Inputs | 12 | 16 |
| 封裝 | 68-pin PLCC | 28-pin J-lead PLCC (Plastic Leaded Chip Carrier) |
| Package Suffix | LC (PLCC, windowed for UV erase on L variant) | — |
| Speed Grade | 20 ns (commercial) | — |
| 工作溫度 | 0C to +70C (commercial) | 0 °C to +70 °C (commercial) |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status - confirm with manufacturer] |
| Bidirectional I/O Pins | — | 48 |
| External Clocks | — | 4 |
| Supply Voltage (VCC) | — | 5 V nominal |
| I/O Standard | — | TTL-compatible 5 V |
| Programming Tool | — | Altera MAX+PLUS II / Quartus Classic |