EP1AGX50DF1152C5N vs EP1AGX50DF1152I4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1AGX50DF1152C5N sa pamamagitan ng Intel at EP1AGX50DF1152I4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1AGX50DF1152C5N - 50K LE Arria GX FPGA with 3.125 Gbps Transceivers | Intel
EP1AGX50DF1152C5N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1AGX50DF1152C5N | EP1AGX50DF1152I4N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | Arria GX | Arria GX |
| Logic Elements (LE) | 50,160 | 50160 |
| Embedded Memory Bits | 2,475,072 bits | — |
| Embedded Multipliers (18x18) | 244 | — |
| Transceiver Channels | 8 full-duplex (up to 3.125 Gbps) | — |
| Maximum Transceiver Data Rate | 3.125 Gbps per channel | — |
| PLLs | 4 | — |
| Maximum User I/O Pins | 281 | — |
| Packhaging | 1152-ball FineLine BGA (FBGA-1152) | 1152-ball FineLine BGA |
| Speed Grade | -5 (commercial, slowest grade) | I4 |
| Process Technology | 90 nm CMOS, 1.2 V core | — |
| Operating Temperature (Commercial) | 0 C to +85 C (TJ) | — |
| Supply Voltage (Core) | 1.2 V | — |
| Supply Voltage (Auxiliary/PLL) | 2.5 V / 3.3 V | — |
| Tindminan RoHS | Compliant (Pb-free) | — |
| Configuration Scheme | Active Serial (AS), Passive Serial (PS), JTAG, Fast Passive Parallel (FPP) | — |
| Supported Serial Protocols | PCIe Gen1 x1/x4, Gigabit Ethernet, Serial RapidIO, CEI-6G SR | — |
| User I/O Pins | — | 514 |
| Embedded Memory | — | 2475072 bits |
| Maximum User I/O Banks | — | [DATA_NEEDED: number of IO banks] |
| Transceivers | — | Up to 3.125 Gbps multi-gigabit transceivers |
| Temperature na Operasyon | — | -40C to +100C (Industrial) |
| Uri ng Pagpapasok | — | Surface Mount |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Lead-Free / RoHS | — | Yes (RoHS Compliant) |
| Process Node | — | [DATA_NEEDED: process technology] |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| PLL Count | — | [DATA_NEEDED: PLL count] |
| Configuration Method | — | Passive serial / Fast passive parallel / JTAG |