EP1C20F324C7 vs EP1C20F324C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1C20F324C7 sa pamamagitan ng Intel at EP1C20F324C6 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1C20F324C7 | EP1C20F324C6 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Series | Cyclone | — |
| Family | Cyclone I (EP1C20) | Cyclone |
| Logic Elements (LE) | 20,060 | 20,060 |
| Logic Array Blocks (LABs) | 2,006 | — |
| Embedded RAM Bits | 294,912 | 294,912 bits (64 M4K blocks × 4,608 bits) |
| M4K RAM Blocks (4 Kbit + 512 parity) | 60 | — |
| Maximum User I/O | 233 | — |
| PLLs | 2 | 4 |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Packhaging | FBGA-324 (324-BGA, 19 × 19 mm, 1.0 mm pitch) | 324-ball FBGA (FineLine BGA) |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Operating Temperature Grade | Commercial (C) | — |
| Speed Grade | 7 (-7) | 6 |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | — |
| Configuration Mode | AS / PS / JTAG | — |
| User I/O Count | — | 233 |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltage Standards | — | LVCMOS / LVTTL (3.3 V, 2.5 V, 1.8 V, 1.5 V), LVDS |
| Maximum Internal Frequency | — | 405.2 MHz |
| LVDS Data Rate (per pair) | — | Up to 640 Mbps |
| Memory Interfaces | — | DDR SDRAM, QDR SRAM, SDR SDRAM |
| Temperature Grade | — | Commercial (0 °C to +85 °C) |
| Configuration Modes | — | Active Serial (AS), Passive Serial (PS), JTAG |