EP1K100QI208-2 vs EP1K100QC208-3 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1K100QI208-2 sa pamamagitan ng Altera at EP1K100QC208-3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP1K100QI208-2 EP1K100QC208-3
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND NRND
Family ACEX-1K —
Logic Elements 4,992 cells —
System Gates 100,000 —
Logic Array Blocks (LABs) 624 624
Embedded Memory (EAB) 49,152 bits —
User I/Os 147 —
Maximum Operating Frequency 250 MHz —
Core Voltage (VCCINT) 2.5 V —
Process Technology 0.22 umm CMOS SRAM 0.22 um CMOS
Packhaging 208-pin PQFP (BFQFP) —
Pitch 0.5 mm —
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon -40C to +85C (Industrial) —
Configuration Interface JTAG (IEEE 1149.1) / serial / EPC2 —
Global Clock Networks 4 —
I/O Standards Supported LVTTL, LVCMOS, PCI, 5V tolerant [DATA_NEEDED: supported I/O standards]
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] —
Product Family — ACEX 1K
Device Type — FPGA (Field Programmable Gate Array)
Typical Gate Count — 100,000 gates
Number of Logic Elements — 4,992
Total RAM Bits — 49,152 bits
Maximum User I/O — 147
Maximum Internal Clock Frequency — 200 MHz
Core Supply Voltage — 2.5 V
Package Type — 208-Pin BFQFP (PQFP)
Number of Terminals — 208
Terminal Form — Gull Wing
Package Shape — Square
Temperature Grade — Commercial
Speed Grade — -3
RoHS / Lead-Free Suffix — No -N suffix; compliance not verified in retrieved source data
Configuration Memory — SRAM-based loadable PLD

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita