EP1K10TC100-2 vs EP1K10TC100-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1K10TC100-2 sa pamamagitan ng Intel at EP1K10TC100-3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1K10TC100-3N - 10K-Gate ACEX-1K FPGA, 576 Cells, 66 I/O, 100-TQFP | Intel / Altera
EP1K10TC100-3N ObsoletePagsanggunian na paghahambing
| Parametro | EP1K10TC100-2 | EP1K10TC100-3N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | ACEX-1K | ACEX 1K |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Logic Elements / Cells | 576 | — |
| Number of Logic Array Blocks (LABs/CLBs) | 72 | — |
| Total RAM Bits | 12288 | — |
| Number of Gates | 10000 (typical); 56000 (maximum) | — |
| Number of User I/O | 66 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Pin-to-Pin Logic Delay | 0.5 ns | — |
| Maximum Internal Frequency | 200 MHz (per FPGAkey listing) | — |
| Process Technology | 0.22 μm CMOS | 0.22 µm CMOS |
| Core Supply Voltage (VCCINT) | 2.375 V to 2.625 V (2.5 V nominal) | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Temperature na Operasyon | 0 °C to 70 °C (TA, commercial) | [DATA_NEEDED: operating temperature range] |
| Packhaging | 100-pin TQFP (TQFP-100) | 100-pin TQFP |
| Uri ng Pagpapasok | Surface Mount | — |
| Configuration Method | SRAM, serial / JTAG (IEEE 1149.1) | — |
| Tindminan RoHS | Compliant (per Heisener / DigiKey listings) | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | Yes | — |
| Series | — | ACEX-1K |
| Manufacturer | — | Intel (formerly Altera) |
| Typical Gate Count | — | 10,000 gates |
| Logic Elements (Cells) | — | 576 |
| Embedded Memory (EAB) | — | 12,288 bits |
| Number of LABs | — | 72 |
| User I/O Count | — | 66 |
| Operating Voltage (Core) | — | 2.5 V |
| Maximum Internal Clock Frequency | — | 200 MHz |
| Speed Grade | — | -3 (commercial) |
| JTAG Support | — | Yes (IEEE 1149.1-1990) |
| PCI Compliance | — | PCI Local Bus Specification Revision 2.2 (5.0 V) |
| Configuration | — | JTAG / serial configuration device |