EP1K30QI208-3N vs EP1K30QC208-3N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1K30QI208-3N sa pamamagitan ng Altera at EP1K30QC208-3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EP1K30QC208-3N EP1K30QC208-3N - ACEX-1K FPGA, 30K Gates, 208-PQFP | Altera

EP1K30QC208-3N - ACEX-1K FPGA, 30K Gates, 208-PQFP | Altera

EP1K30QC208-3N ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EP1K30QI208-3N EP1K30QC208-3N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Huling Pagbili
Series ACEX 1K —
Family ACEX-1K ACEX-1K
Logic Elements / Cells 1728 —
Total RAM Bits 24576 —
Number of I/O 147 —
Number of Dedicated Inputs 6 —
Number of Gates (typical) 30000 —
Number of Embedded Array Blocks 6 —
Core Supply Voltage 2.375 V to 2.625 V (nominal 2.5 V) 2.5 V
I/O Standards LVTTL, LVCMOS (multi-voltage I/O) —
Temperature na Operasyon -40 C to +85 C (industrial) Industrial (N suffix)
Speed Grade -3 -3 (fastest)
Packhaging 208-pin PQFP / FQFP (S-PQFP-G208), 0.5 mm pitch 208-BQFP / 208-PQFP
Configuration Memory Volatile SRAM (serial configuration required) —
Programming Interface JTAG (IEEE 1149.1) + serial configuration —
Uri ng Pagpapasok Surface Mount (fine-pitch QFP) Surface Mount
Tindminan RoHS Compliant Compliant (lead-free / Pb-free)
Logic Elements — 1,728
Typical Gates — 30,000
Logic Array Blocks (LABs) — 172
Embedded Array Blocks (EABs) — 6 (24 Kbits total)
Maximum User I/O — 147
Process Technology — 0.18 µm CMOS, SRAM-based LUT
I/O Supply Voltage (VCCIO) — 3.3 V (5 V tolerant I/O supported)
Configuration Interface — Serial / Parallel / JTAG (IEEE 1149.1)

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