EP1M120F484-I6 vs EP1M120F484 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120F484-I6 sa pamamagitan ng Altera at EP1M120F484 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120F484-I6 | EP1M120F484 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Mercury FPGA | Mercury (EP1M) |
| Logic Elements (LEs) | 4,800 | — |
| Equivalent Gates | 120,000 | — |
| Logic Array Blocks (LABs) | 480 | — |
| User I/Os | 303 | — |
| High-Speed Transceivers | Up to 12 channels | — |
| Transceiver Data Rate | Up to 1.25 Gbps per channel | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.18 µm CMOS | CMOS |
| Packhaging | 484-pin FBGA (FineLine BGA) | 484-pin FineLine BGA (FCBGA) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature na Operasyon | -40 °C to +100 °C (industrial) | Unknown [DATA_NEEDED: operating temperature range] |
| Speed Grade | -6 | — |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, JTAG, EPC device | — |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL | — |
| Logic Elements / Cells | — | 4,800 |
| Gate Count | — | 120,000 |
| Embedded Memory (Bits) | — | 49,152 |
| User I/O Pins | — | 303 |
| Total Package Pins | — | 484 |
| Core Supply Voltage | — | 1.8 V |
| I/O Supply Voltage | — | 3.3 V / 2.5 V |
| Transceiver Channels | — | Up to 18 channels |
| Max Transceiver Data Rate | — | 1.25 Gbps with CDR |
| Speed Grade (this P/N) | — | Not specified in provided data [DATA_NEEDED: speed grade] |
| Configuration Interface | — | JTAG (IEEE 1149.1) / EPC serial |
| Tindminan RoHS | — | Unknown [DATA_NEEDED: RoHS status] |