EP1M120F484C7 vs EP1M120B484C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120F484C7 sa pamamagitan ng Altera at EP1M120B484C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120F484C7 | EP1M120B484C6 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Mercury (EP1M) | Mercury (ACEX 1M) |
| Logic Family | CMOS | — |
| Logic Elements | 49,152 | — |
| Number of LABs | 480 | — |
| User I/Os | 303 | — |
| Bilang ng Pins | 484 | — |
| Package Type | FineLine BGA (FBGA-484) | — |
| Core Supply Voltage | 1.8 V | — |
| Temperature na Operasyon | 0 C to 85 C (Commercial) | — |
| High-Speed Transceivers | Integrated, CDR up to 1.25 Gbps | — |
| Configuration | JTAG / Active Serial (per datasheet) | — |
| Device Type | Loadable PLD (FPGA) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Country of Origin | [DATA_NEEDED: COO] | — |
| Logic Elements (typical) | — | 120 LE |
| Maximum Logic Elements | — | [DATA_NEEDED: maximum logic elements] |
| Flip-Flops | — | 4,800 |
| User I/O Pins (max) | — | 303 |
| Configuration Memory | — | SRAM-based (volatile, re-load on power-up) |
| Packhaging | — | 484-ball FineLine BGA (BGA-484) |
| Uri ng Pagpapasok | — | Surface Mount |
| Peak Reflow Temperature | — | 220 °C |
| Operating Temperature Grade | — | Commercial (C suffix) |
| Process Node | — | 0.18 µm |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Configuration Modes | — | PS, AS, JTAG |
| Design Software | — | Quartus II (legacy support required) |