EP1M120F484C7 vs EP1M120B484C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120F484C7 sa pamamagitan ng Altera at EP1M120B484C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120F484C7 | EP1M120B484C7 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Mercury (EP1M) | Mercury |
| Logic Family | CMOS | — |
| Logic Elements | 49,152 | 49,152 |
| Number of LABs | 480 | — |
| User I/Os | 303 | — |
| Bilang ng Pins | 484 | — |
| Package Type | FineLine BGA (FBGA-484) | 484-ball FineLine BGA (FCBGA) |
| Core Supply Voltage | 1.8 V | — |
| Temperature na Operasyon | 0 C to 85 C (Commercial) | [DATA_NEEDED: operating temp range] |
| High-Speed Transceivers | Integrated, CDR up to 1.25 Gbps | — |
| Configuration | JTAG / Active Serial (per datasheet) | — |
| Device Type | Loadable PLD (FPGA) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Country of Origin | [DATA_NEEDED: COO] | — |
| Embedded Memory (bits) | — | 4,800 Kbit (4,800 Kb / 600 KB) |
| User I/O Pins | — | 303 |
| Number of PLLs | — | [DATA_NEEDED: PLL count] |
| Core Voltage | — | 1.5 V |
| Process Node | — | 0.13 µm |
| Uri ng Pagpapasok | — | Surface Mount |
| Configuration Method | — | SRAM / JTAG / Passive Serial |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, LVDS (multi-standard I/O) |
| Peak Reflow Temperature | — | 220 C |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Device | — | EPC2 / EPC4 compatible |
| Design Tool | — | Quartus II (legacy version) |