EP1M120F484C7 vs EP1M120B484C7 比較
詳細並排比較 EP1M120F484C7 由 Altera 與 EP1M120B484C7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1M120F484C7 | EP1M120B484C7 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Mercury (EP1M) | Mercury |
| Logic Family | CMOS | — |
| Logic Elements | 49,152 | 49,152 |
| Number of LABs | 480 | — |
| User I/Os | 303 | — |
| 腳位數 | 484 | — |
| Package Type | FineLine BGA (FBGA-484) | 484-ball FineLine BGA (FCBGA) |
| Core Supply Voltage | 1.8 V | — |
| 工作溫度 | 0 C to 85 C (Commercial) | [DATA_NEEDED: operating temp range] |
| High-Speed Transceivers | Integrated, CDR up to 1.25 Gbps | — |
| Configuration | JTAG / Active Serial (per datasheet) | — |
| Device Type | Loadable PLD (FPGA) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| MSL 等級 | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Country of Origin | [DATA_NEEDED: COO] | — |
| Embedded Memory (bits) | — | 4,800 Kbit (4,800 Kb / 600 KB) |
| User I/O Pins | — | 303 |
| Number of PLLs | — | [DATA_NEEDED: PLL count] |
| Core Voltage | — | 1.5 V |
| Process Node | — | 0.13 µm |
| 安裝類型 | — | Surface Mount |
| Configuration Method | — | SRAM / JTAG / Passive Serial |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, LVDS (multi-standard I/O) |
| Peak Reflow Temperature | — | 220 C |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Device | — | EPC2 / EPC4 compatible |
| Design Tool | — | Quartus II (legacy version) |