EP1M120F484I6M vs EP1M120F484I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120F484I6M sa pamamagitan ng Altera at EP1M120F484I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120F484I6M | EP1M120F484I5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Mercury (EP1M) | Mercury |
| Logic Elements | 120,000 | — |
| System Gates | 480,000 (typical) | — |
| LABs / CLBs | 303 | — |
| Flip-Flops | 49,152 | — |
| Embedded Memory (Bits) | 4,800 Kb (480 Kbits) | — |
| Package Type | 484-Ball FCBGA | 484-BBGA, FCBGA (FineLine BGA) |
| Package Code | BGA, 484 balls, Fine-pitch | — |
| Package Shape | Square | — |
| Terminal Form | Ball | — |
| Temperature Grade | Industrial | Industrial (-40C to +100C) |
| Speed Grade | -6 (slowest Mercury timing bin) | 5 |
| Volte ng Pagbibigay | 1.5 V core / 3.3 V aux (per Mercury datasheet) | — |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, LVDS | — |
| Clock Management | PLLs (per Mercury family) | — |
| Boundary-Scan | IEEE 1149.1 / JTAG | — |
| Tindminan RoHS | Compliant (M revision) | Compliant |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Supply Voltage (Core) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| User I/Os | — | 303 |
| Logic Family | — | CMOS |
| Logic Elements / Cells | — | [DATA_NEEDED: logic element count] |
| Total RAM Bits | — | 49152 |
| Number of Gates | — | 4800 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Transceivers | — | Integrated CDR up to 1.25 Gbps |
| Package Dimensions | — | 23 x 23 mm |
| Bilang ng Pin | — | 484 |
| Pitch | — | 1.0 mm |
| Lead-Free / Pb-Free | — | Yes (N suffix) |
| Uri ng Pagpapasok | — | Surface Mount |